HT45RM03 datasheet(9/54 Pages) HOLTEK

9 / 54 page

HT45RM03

Rev. 1.10

February 16, 2007

Indirect Addressing Register

The method of indirect addressing allows data manipu-

lation using memory pointers instead of the usual direct

memory addressing method where the actual memory

address is defined. Any action on the indirect address-

ing registers will result in corresponding read/write oper-

ations to the memory location specified by the

corresponding memory pointers. This device contains

two indirect addressing registers known as IAR0 and

IAR1 and two memory pointers MP0 and MP1. Note that

these indirect addressing registers are not physically

implemented and that reading the indirect addressing

registers indirectly will return a result of

²00H² and writ-

ing to the registers indirectly will result in no operation.

The two memory pointers, MP0 and MP1, are physically

implemented in the data memory and can be manipu-

lated in the same way as normal registers providing a

convenient way with which to address and track data.

When any operation to the relevant indirect addressing

registers is carried out, the actual address that the

microcontroller is directed to is the address specified by

the related memory pointer.

Direct data transfer between two indirect addressing

registers is not supported. The memory pointer regis-

ters, MP0 and MP1, are both 8-bit registers used to ac-

cess the Program Memory by combining corresponding

indirect addressing registers.

Accumulator

The accumulator is closely related to ALU operations. It

is also mapped to location 05H of the data memory and

can carry out immediate data operations. The data

movement between two data memory locations must

pass through the accumulator.

Arithmetic and Logic Unit

- ALU

This circuit performs 8-bit arithmetic and logic operations.

The ALU provides the following functions:

· Arithmetic operations (ADD, ADC, SUB, SBC, DAA)

· Logic operations (AND, OR, XOR, CPL)

· Rotation (RL, RR, RLC, RRC)

· Increment and Decrement (INC, DEC)

· Branch decision (SZ, SNZ, SIZ, SDZ ....)

The ALU not only saves the results of a data operation but

also changes the status register.

Status Register

- STATUS

This 8-bit register (0AH) contains the zero flag (Z), carry

flag (C), auxiliary carry flag (AC), overflow flag (OV),

power down flag (PDF), and watchdog time-out flag

(TO). It also records the status information and controls

the operation sequence.

With the exception of the TO and PDF flags, bits in

the status register can be altered by instructions like

most other registers. Any data written into the status

tion operations related to the status register may give

different results from those intended. The TO flag

can be affected only by system power-up, a WDT

time-out or executing the

²CLR WDT² or ²HALT² in-

struction. The PDF flag can be affected only by exe-

cuting the

²HALT² or ²CLR WDT² instruction or a

system power-up.

The Z, OV, AC and C flags generally reflect the status of

the latest operations.

In addition, on entering the interrupt sequence or exe-

cuting the subroutine call, the status register will not be

pushed onto the stack automatically. If the contents of

the status are important and if the subroutine can cor-

rupt the status register, precautions must be taken to

save it properly.

Bit No.

Label

Function

C is set if the operation results in a carry during an addition operation or if a borrow does not

take place during a subtraction operation; otherwise C is cleared. C is also affected by a ro-

tate through carry instruction.

1AC

AC is set if the operation results in a carry out of the low nibbles in addition or no borrow from

the high nibble into the low nibble in subtraction; otherwise AC is cleared.

Z is set if the result of an arithmetic or logic operation is zero; otherwise Z is cleared.

3OV

OV is set if the operation results in a carry into the highest-order bit but not a carry out of the

highest-order bit, or vice versa; otherwise OV is cleared.

PDF

PDF is cleared by system power-up or executing the

²CLR WDT² instruction.

PDF is set by executing the

²HALT² instruction.

5TO

TO is cleared by system power-up or executing the

²CLR WDT² or ²HALT² instruction.

TO is set by a WDT time-out.

6~7

Unused bit, read as

²0²

Status (0AH) Register

HT45RM03 数据表(PDF) 9 Page - Holtek Semiconductor Inc

HT45RM03 数据表(HTML) 9 Page - Holtek Semiconductor Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54

数据表下载