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HT45R34 数据表(PDF) 13 Page - Holtek Semiconductor Inc |
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HT45R34 数据表(HTML) 13 Page - Holtek Semiconductor Inc |
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13 / 41 page ![]() HT45R34 Rev. 1.20 13 October 15, 2007 Timer/Event Counter An 8-bit timer/event counter, known as Timer/Event Counter, is implemented in the microcontroller. The Timer/Event Counter contains an 8-bit programmable count-up counter whose clock may come from an exter- nal source or from the system clock. Using the external clock input allows the user to count external events, mea- sure time internals or pulse widths, or generate an accu- rate time base. Using the internal clock allows the user to generate an accurate time base. There are 2 registers related to the Timer/Event Coun- ter, TMR and TMRC. Two physical registers are mapped to the TMR location; writing to TMR places the start value of the Timer/Event Counter in a preload register while reading TMR retrieves the contents of the Timer/Event Counter. The TMRC is a timer/event coun- ter control register, which defines the timer operating conditions. Register Reset (Power-on) WDT Time-out (Normal Operation) RES Reset (Normal Operation) RES Reset (HALT) WDT Time-out (HALT)* TMRC 00-0 1000 00-0 1000 00-0 1000 00-0 1000 uu-u uuuu PA 1111 1111 1111 1111 1111 1111 1111 1111 uuuu uuuu PAC 1111 1111 1111 1111 1111 1111 1111 1111 uuuu uuuu ASCR ---1 1111 ---1 1111 ---1 1111 ---1 1111 ---u uuuu INTC1 ---0 ---0 ---0 ---0 ---0 ---0 ---0 ---0 ---u ---u TMRAH xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx uuuu uuuu TMRAL xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx uuuu uuuu RCOCCR 0000 1--- 0000 1--- 0000 1--- 0000 1--- uuuu u--- TMRBH xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx uuuu uuuu TMRBL xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx uuuu uuuu RCOCR 1xxx --00 1xxx --00 1xxx --00 1xxx --00 uuuu --uu Note: ²*² means ²warm reset² ²u² means ²unchanged² ²x² means ²unknown² Bit No. Label Function 0~2 TPSC0~TPSC2 To define the prescaler stages, TPSC2, TPSC1, TPSC0= 000: fINT=fSYS 001: fINT=fSYS/2 010: fINT=fSYS/4 011: fINT=fSYS/8 100: fINT=fSYS/16 101: fINT=fSYS/32 110: fINT=fSYS/64 111: fINT=fSYS/128 3TE To define the TMR active edge of the timer/event counter (0=active on low to high; 1=active on high to low) 4 TON To enable or disable timer counting (0=disabled; 1=enabled) 5 ¾ Unused bit, read as ²0² 6 7 TM0 TM1 To define the operating mode, TM1, TM0= 01=Event count mode (external clock) 10=Timer mode (internal clock) 11=Pulse width measurement mode 00=Unused TMRC (0EH) Register |
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