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HV232PJ-G 数据表(PDF) 2 Page - Supertex, Inc

部件名 HV232PJ-G
功能描述  Low Charge Injection 8-Channel High Voltage Analog Switches with Bleed Resistors
PDF  9 Pages
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制造商  SUTEX [Supertex, Inc]
网页  http://www.supertex.com
标志 SUTEX - Supertex, Inc

HV232PJ-G 数据表(HTML) 2 Page - Supertex, Inc

  HV232PJ-G Datasheet HTML 1Page - Supertex, Inc HV232PJ-G Datasheet HTML 2Page - Supertex, Inc HV232PJ-G Datasheet HTML 3Page - Supertex, Inc HV232PJ-G Datasheet HTML 4Page - Supertex, Inc HV232PJ-G Datasheet HTML 5Page - Supertex, Inc HV232PJ-G Datasheet HTML 6Page - Supertex, Inc HV232PJ-G Datasheet HTML 7Page - Supertex, Inc HV232PJ-G Datasheet HTML 8Page - Supertex, Inc HV232PJ-G Datasheet HTML 9Page - Supertex, Inc  
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2
HV230/HV232
Ordering Information
Package Options
Device
28-Lead PLCC
48-Lead LQFP/TQFP
(1.4mm)
26-Lead BCC
26-Ball fpBGA
HV230
-
-
-
HV230GA
HV230B1-G
HV230GA-G
HV232
HV232PJ
HV232FG
--
HV232PJ-G
HV232FG-G
-G indicates the part is RoHS compliant (Green)
Absolute Maximum Ratings
Parameter
Value
V
DD logic power supply voltage
-0.5V to +15V
V
PP - VNN supply voltage
220V
V
PP positive high voltage supply
-0.5V to V
NN +200V
V
NN negative high voltage supply
+0.5V to -200V
Logic input voltages
-0.5V to V
DD +0.3V
Analog signal range
V
NN to VPP
Peak analog signal current/channel
3.0A
Storage temperature
-65OC to +150OC
Power dissipation:
28-Lead PLCC
48-Lead LQFP/TQFP(1.4mm)
26-Lead BCC
26-Ball fpBGA
1.2W
1.0W
1.0W
1.0W
Operating Conditions
Symbol Parameter
Value
V
DD
Logic power supply voltage 1,3
4.5V to 13.2V
V
PP
positive high voltage supply 1,3
40V to V
NN +200V
V
NN
negative high voltage supply 1,3
-40V to -160V
V
IH
High level input voltage
V
DD -1.5V to VDD
V
IL
Low-level input voltage
0V to 1.5V
V
SIG
Analog signal voltage peak-to-peak
V
NN +10V to VPP -10V
2
T
A
Operating free air temperature
0OC to 70OC
Absolute Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation under these conditions is not implied. Continuous operation of the device
at the absolute rating level may affect device reliability. All voltages are referenced to device
ground.
Notes:
1. Power up/down sequence is arbtrary except GND must be powered -up first and powered down last.
2. V
SIG must be VNN ≤ VSIG ≤ VPP or floating during power up/down transition.
3. Rise and fall times of power supplies V
DD, VPP, and VNN should not be less than 1.0msec.



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