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 2004 Semtech Corp.

www.semtech.com

SC4611

POWER MANAGEMENT

Applications Information

INTR

INTR

INTR

INTR

INTRODUCTION

ODUCTION

ODUCTION

ODUCTION

ODUCTION

The SC4611 is designed to control and drive N-Channel

MOSFET synchronous rectified buck convertors. The

switching frequency is programmable to optimize design.

The SC4611 switching regulator section features external

current sensing and provides a hiccup mode overcurrent

protection followed by a latched shutdown. It is also

optimized for multiple convertors operating in parallel

redundant mode.

PO

PO

PO

PO

POWERING THE CONTR

WERING THE CONTR

WERING THE CONTR

WERING THE CONTR

WERING THE CONTROLLER

OLLER

OLLER

OLLER

OLLER

Supplies VIN, PVCC and AVCC from the input source are

used to power the SC4611. The VIN supply provides the

bias for the internal reference and UVLO circuitry. The AVCC

supply provides the bias for the oscillator, PWM switcher,

voltage feedback, current sense and the Power OK circuitry.

PVCC is used to drive the low and high side MOSFET gates.

An external PNP transistor can be set up as a linear

regulator to generate well regulated AVCC and PVCC as

shown in the Typical Application Circuit. The maximum

current into the BDI pin should be limited to 5 mA under

all conditions. For example if an external PNP transistor is

used with Vin less than 7V, the BDI pin will saturate and

pull down the Vin input. A series resistor between the base

of the external PNP transistor and the BDI should be used

to limit the current into the BDI pin.

The VCC pins have an absolute maximum rating of 7V. If

maximum VIN is less than 7V it may be connected directly

to AVCC and PVCC, leaving the BDI pin open.

S

SS

SSTTTTTAR

AR

AR

AR

ART UP SEQUENCE

T UP SEQUENCE

T UP SEQUENCE

T UP SEQUENCE

T UP SEQUENCE

Start up is inhibited until AVCC input reaches its UVLO

threshold. The UVLO limit is 4.2V typical. The power up

sequence is initiated by a 7 uA current source charging the

soft start capacitor connected to the SS pin. When the SS

pin reaches 1V, the converter will start switching. The

reference input of the error amplifier is ramped up with

the soft-start signal, level shifted down by 1V. Initially only

the high side driver is enabled. Keeping the low side

MOSFET off during start up is useful where multiple

convertors are operating in parallel. It prevents forward

conduction in the freewheeling MOSFET which might

otherwise cause a dip in the common output bus.

When the SS pin reaches 2V, the low side MOSFET will

begin to switch and the convertor is fully operational in the

synchronous mode. The reference input of the error

amplifier is released and the SS pin is pulled up to AVCC.

The soft start duration is controlled by the value of the SS

cap. If the SS pin is pulled below 0.5V, the device is disabled

and draws only 4 mA current.

Note that the SS pin threshold for soft-start is supply

dependant and defined above for AVCC = 6V. If AVCC is

lower, the threshold should be reduced proportionately,

i.e. SS enable threshold will be 0.375V when AVCC = 4.5V.

G

G

G

G

GAAAAATE DRIVERS

TE DRIVERS

TE DRIVERS

TE DRIVERS

TE DRIVERS

The low side gate driver is supplied from PVCC and provides

a peak source/sink current of 2A. The high side gate drive

is also capable of sourcing and sinking peak currents of

2A. Protection logic provides a 30 nS dead time to ensure

both the upper and lower MOSFETs will not turn on

simultaneously and cause a shoot through condition.

The high side MOSFET gate drive can be provided by an

external 12V supply that is connected from BST to GND.

The actual gate to source voltage of the upper MOSFET will

approximately equal 6V (12V-VCC). If the external 12V

supply is not available, a classical bootstrap technique can

be implemented from the PVCC supply. A bootstrap

capacitor is connected from BST to Phase while PVCC is

connected through a diode (Low V

diode) to the BST. This will provide a gate to source voltage

approximately equal to the VCC-Vdiode drop.

OSCILLA

OSCILLA

OSCILLA

OSCILLA

OSCILLATTTTTOR

OR

OR

OR

OR

The switching frequency fsw of the SC4611 is set by an

external resistor using the following formula:

Fsw

RT

9375

=

R

approximation of the more complex relationship between

RT and Fsw. The oscillator can be synchronised to an

external clock that is nominally faster than the internal

frequency set by R

should be lower than AVCC of the device.