TPS7A2012PDBVR datasheet(3/58 Pages) TI

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4 Pin Configuration and Functions

Not to scale

OUT

GND

Figure 4-1. YCJ and YCK Packages,

4-Pin DSBGA (Top View)

Not to scale

GND

OUT

Figure 4-2. YCJ and YCK Packages,

4-Pin DSBGA (Bottom View)

Pin Functions: DSBGA

I/O

DESCRIPTION

NO.

NAME

Input voltage supply. For best transient response and to minimize input impedance, use

the nominal value or larger capacitor from IN to ground as listed in the Recommended

Operating Conditions table. Place the input capacitor as close to the IN and GND pins of the

device as possible.

OUT

Regulated output voltage. A low equivalent series resistance (ESR) capacitor is required

from OUT to ground for stability. For best transient response, use the nominal

recommended value or larger capacitor listed in the Recommended Operating Conditions

table. Place the output capacitor as close to the OUT and GND pins of the device as

possible.

Enable input. A low voltage (< VEN(LOW)) on this input turns the regulator off and discharges

the output pin to GND. A high voltage (> VEN(HI)) on this pin enables the regulator output.

This pin has an internal 500kΩ pulldown resistor to hold the regulator off by default. When

VEN > VEN(HI), the 500kΩ pulldown is disconnected to reduce input current.

GND

—

Common ground.

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TPS7A20

SBVS338H – MARCH 2020 – REVISED JULY 2024

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