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POWER MANAGEMENT

SC2659

current transient. The overshoot during a high to low

load current transient is reduced by subtracting the volt-

age that is on the DROOP pin from VREF. The voltage on

the IO pin is divided down with an external resistor di-

vider, and connected to the DROOP pin.

Thus, under

loaded conditions, VOUT is regulated to:

VOUT = VREF • (1+R7/R8) - IOUT • R2/(R1+R2).

Inhibit

The inhibit pin is a TTL compatible digital pin that is used

to enable the controller. When INH is low, the output

drivers are low, the soft start capacitor is discharged,

the soft start current source is disabled, and the control-

ler is in a low I

When INH goes high, the short

across the soft start capacitor is removed, the soft start

current source is enabled, and normal converter opera-

tion begins. When the system logic supply is connected

to INH, it controls power sequencing by locking out con-

troller operation until the system logic supply exceeds

the input threshold voltage of the INH circuit; thus the

+12V supply and the system logic supply (either +5V or

3.3V) must be above UVLO thresholds before the con-

troller is allowed to start up.

VIN

The VIN undervoltage lockout circuit disables the con-

troller while the +12V supply is below the 10V start

threshold during power-up. While the controller is dis-

abled, the output drivers will be low, the soft start ca-

pacitor will be shorted and the soft start current is dis-

abled and the controller will be in a low I

VIN exceeds the start threshold, the short across the

soft start capacitor is removed, the soft start current

source is enabled and normal converter operation be-

gins. There is a 2V hysteresis in the undervoltage lock-

out circuit for noise immunity.

Soft Start

The soft start circuit controls the rate at which VOUT pow-

ers up. A capacitor is connected between SS and AGND

and is charged by an internal current source. The value

of the current source is proportional to the reference

voltage so the charging rate of C

the reference voltage. By making the charging current

proportional to VREF, the power-up time for VOUT will be

independent of VREF. Thus, C

value for all VID settings. The soft start charging current

is determined by the following equation: I

Where I

is recommended that no additional loads be connected

to REFB, other than the resistor divider for setting the

hysteresis voltage. Thus these resistor values will deter-

mine the soft start charging current. The maximum cur-

rent that can be sourced by REFB is 500µA.

Power Good

The power good circuit monitors for an undervoltage con-

dition on VOUT. If VSENSE is 15% (nominal) below VREF,

then the power good pin is pulled low. The PWRGD pin is

an open drain output.

Overvoltage Protection

The overvoltage protection circuit monitors VOUT for an

overvoltage condition. If VSENSE is 15% above VREF,

than a fault latch is set and both output drivers are turned

off. The latch will remain set until VIN goes below the

undervoltage lockout value. A 1ms deglitch timer is in-

cluded for noise immunity.

Overcurrent Protection

The overcurrent protection circuit monitors the current

through the high side FET. The overcurrent threshold is

adjustable with an external resistor divider between IO

and AGND, with the divider voltage connected to the OCP

pin. If the voltage on the OCP pin exceeds 100mV, then

a fault latch is set and the output drivers are turned off.

The latch will remain set until VIN goes below the

undervoltage lockout value. A 1ms deglitch timer is in-

cluded for noise immunity. The OCP circuit is also de-

signed to protect the high side FET against a short-to-

ground fault on the terminal common to both power FETs

(VPHASE).

Drive Regulator

The drive regulator provides drive voltage to the low side

driver, and to the high side driver when the high side

driver is configured as a floating driver. The minimum

drive voltage is 7V. The minimum short circuit current is

100mA.

Applications Information - Functional Description (Cont.)