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ST7LITE2 数据表(PDF) 117 Page - STMicroelectronics |
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ST7LITE2 数据表(HTML) 117 Page - STMicroelectronics |
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117 / 133 page  ST7LITE2 117/133 ADC CHARACTERISTICS (Cont’d) Figure 91. ADC Accuracy Characteristics with amplifier enabled Note: When the AMPSEL bit in the ADCDRL register is set, it is mandatory that fADC be less than or equal to 2 MHz. (if fCPU=8MHz. then SPEED=0, SLOW=1). EO EG 1LSBIDEAL 1LSB IDEAL V DD V SS – 1024 -------------------------------- = Vin (LSBIDEAL) (1) Example of an actual transfer curve (2) The ideal transfer curve (3) End point correlation line ET=Total Unadjusted Error: maximum deviation between the actual and the ideal transfer curves. EO=Offset Error: deviation between the first actual transition and the first ideal one. EG=Gain Error: deviation between the last ideal transition and the last actual one. ED=Differential Linearity Error: maximum deviation between actual steps and the ideal one. EL=Integral Linearity Error: maximum deviation between any actual transition and the end point correlation line. Digital Result ADCDR 704 108 0 1 2 3 4567 701 702 703 704 (1) (2) ET ED EL (3) VSS 430mV 62.5mV Vin (OPAMP) Vin Vout (ADC input) Vmax Vmin 430mV 0V Noise (OPAMP input) |
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