HT82K95EE/HT82K95AE

Rev. 1.20

21

August 28, 2006

To Configure the HT82K95EE/HT82K95AE as PS2 Device

The HT82K95EE/HT82K95AE can be configured as a USB interface or PS2 interface device, by configuring the SPS2

(bit 4 of USR) and SUSB (bit 5 of the USR). If SPS2=1, and SUSB=0, the HT82K95EE/HT82K95AE is configured as a

PS2 interface, pin USBD- is configured as a PS2 Data pin and USBD+ is configured as a PS2 Clk pin. User can easily

read or write to the PS2 Data or PS2 Clk pin by accessing the corresponding bit PS2DAI (bit 4 of the USC), PS2CKI (bit

5 of the USC), PS2DAO (bit 6 of the USC) and S2CKO (bit 7 of the USC) respectively.

User should make sure that in order to read the data properly, the corresponding output bit must be set to

²1². For ex-

ample, if it is desired to read the PS2 Data by reading PS2DAI, the PS2DAO should set to

²1². Otherwise it is always

read as

²0².

If SPS2=0, and SUSB=1, the HT82K95EE/HT82K95AE is configured as a USB interface. Both the USBD- and USBD+

is driven by the SIE of the HT82K95EE/ HT82K95AE. User can only write or read the USB data through the corre-

sponding FIFO.

Both SPS2 and SUSB default is

²0².

USB Interface

There are ten registers, including PIPE_CTRL (41H in bank 1), AWR (address + remote wake-up 42H in bank 1),

STALL (43H in bank 1), PIPE (44H in bank 1), SIES (45H in bank 1), MISC (46H in bank 1), Endpt_EN (47H in bank 1),

FIFO0 (48H in bank 1), FIFO1 (49H in bank 1), and FIFO2 (4AH in bank 1) used for the USB function. AWR register

contains current address and a remote wake up function control bit. The initial value of AWR is

²00H². The address

value extracted from the USB command is not to be loaded into this register until the SETUP stage is completed.

Bit No.

Label

R/W

Function

0

WKEN

W

Remote wake-up enable/disable

7~1

AD6~AD0

W

USB device address

AWR (42H) Register

STALL and PIPE, PIPE_CTRL, Endpt_EN Registers

PIPE register represents whether the endpoint corresponding is accessed by host or not. After ACT_EN signal being

sent out, MCU can check which endpoint had been accessed. This register is set only after the time when host access

the corresponding endpoint.

STALL register shows whether the endpoint corresponding works or not. As soon as the endpoint work improperly, the

bit corresponding must be set.

PIPE_CTRL Register is used for configuring IN (Bit=1) or OUT (Bit=0)Pipe. The default is define IN pipe. Where Bit0

(DATA0) of the PIPE_CTRL Register is used to setting the data toggle of any endpoint (except endpoint0) using data

toggles to the value DATA0. Once the user want the any endpoint (except endpoint0) using data toggles to the value

DATA0. the user can output a LOW pulse to this bit. The LOW pulse period must at least 10 instruction cycle.

Endpt_EN Register is used to enable or disable the corresponding endpoint (except endpoint 0) Enable Endpoint

(Bit=1) or disable Endpoint (Bit=0)

The bitmaps are list as follows :

Register

Name

R/W

Register

Address

Bit7~Bit3 Reserved

Bit 2

Bit 1

Bit 0

Default

Value

PIPE_CTRL

R/W

01000001B

¾

Pipe 2

Pipe 1

Pipe 0

00000111

STALL

R/W

01000011B

¾

Pipe 2

Pipe 1

Pipe 0

00000111

PIPE

R

01000100B

¾

Pipe 2

Pipe 1

Pipe 0

00000000

Endpt_EN

R/W

01000001B

¾

Pipe 2

Pipe 1

Pipe 0

00000111

PIPE_CTRL (41H), STALL (43H), PIPE (44H) and Endpt_EN (47H) Registers