Pin Description

Pin Name

I/O

Description

TIP

I

This pin is connected to the tip side of the twisted pair wires.

RING

I

This pin is connected to the ring side of the twisted pair wires.

OPO

O

Output of OP AMP

VREF

O

X1

I

A crystal or ceramic resonator should be connected to this pin and X2.

This pin may be driven from an external clock source.

X2

O

A crystal or ceramic resonator should be connected to this pin and X1.

DO

O

CAS detection output. Active high.

PDWN

I

A logic

²1² on this pin puts the chip in power down mode. When a logic ²0² is on this pin, the chip

in power up mode. This is a Schmitt trigger input.

VDD

¾

Positive power

VSS

¾

Negative power, ground

AVDD

¾

Analog positive power

AVSS

¾

Analog negative power

NC

¾

No connection

Absolute Maximum Ratings

Supply Voltage .........................................

-0.5V to 6.0V

All Input Voltages.................................................25mW

Operating Temperature Range ...................0

°Cto70°C

Storage Temperature Range ................

-40°Cto150°C

Note: These are stress ratings only. Stresses exceeding the range specified under

²Absolute Maximum Ratings² may

cause substantial damage to the device. Functional operation of this device at other conditions beyond those

listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliabil-

ity.

D.C. Characteristics

Ta=25

°C

Symbol

Parameter

Test Conditions

Min.

Typ.

Max.

Unit

Conditions

Supply Voltage

¾¾

3.5

¾

5.5

V

Operating Current

5V

PDWN=0, 3.58MHz on

¾

2.5

3

mA

Standby Current

5V

PDWN=1, 3.58MHz off

¾

12

mA

²Low² Input Voltage

5V

¾¾

¾

0.3

²High² Input Voltage

5V

¾

0.7

¾¾

Output Source Current (DO)

5V

¾

0.8

¾

mA

Output Sink Current (DO)

5V

¾-0.3

¾

mA

System Clock

¾¾

¾

3.58

¾

MHz

HT9033

Rev. 1.00

2

May 22, 2006