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VIPER53EDIP-E 数据表(PDF) 13 Page - STMicroelectronics

部件名 VIPER53EDIP-E
功能描述  OFF-line Primary Switch
PDF  31 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

VIPER53EDIP-E 数据表(HTML) 13 Page - STMicroelectronics

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VIPer53EDIP - E / VIPer53ESP - E
High Voltage Start-up Current Source
DocRev1
13/31
8
High Voltage Start-up Current Source
An integrated high voltage current source provides a bias current from the DRAIN pin during
the start-up phase. This current is partially absorbed by internal control circuits in standby
mode with reduced consumption, and also supplies the external capacitor connected to the
VDD pin. As soon as the voltage on this pin reaches the high voltage threshold VDDon of the
UVLO logic, the device turns into active mode and starts switching. The start-up current
generator is switched off, and the converter should normally provide the needed current on
the VDD pin through the auxiliary winding of the transformer, as shown on Figure 3 on
page 8.
The external capacitor CVDD on the VDD pin must be sized according to the time needed by
the converter to start-up, when the device starts switching. This time tss depends on many
parameters, including transformer design, output capacitors, soft start feature, and
compensation network implemented on the COMP pin and possible secondary feedback
circuit. The following formula can be used for defining the minimum capacitor needed:
Figure 9 on page 22 shows a typical start-up event. VDD starts from 0V with a charging
current IDDch1 at about 9 mA. When about VDDoff is reached, the charging current is reduced
down to IDDch2 which is about 0.6mA. This lower current leads to a slope change on the VDD
rise. Device starts switching for VDD equal to VDDon, and the auxiliary winding delivers some
energy to VDD capacitor after the start-up time tss.
The charging current change at VDDoff allows a fast complete start-up time tSDU, and
maintains a low restart duty cycle. This is especially useful for short circuits and overloads
conditions, as described in the following section.
C
VD D
I
DD1
tss
V
DDh yst
------------------------
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