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ML688T 数据表(PDF) 1 Page - Pyramid Semiconductor Corporation |
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ML688T 数据表(HTML) 1 Page - Pyramid Semiconductor Corporation |
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1 / 3 page ![]() www.lansdale.com Page 1 of 3 Issue 0 ML688T Dual J-K Flip-Flop The negative–edge–clocked dual J-K flip-flop operates on the master–slave principle. His device provides both SET and RESET inputs on both flip-flops in the package. Each flip-flop may be set or reset by applying a low level to that particular input when the clock is low. The J and K inputs are inhibited when the clock is low and enabled when the clock is high. The logical state of the J and K inputs MUST NOT be allowed to change when the clock is in the high state. Legacy Device: Motorola MC688T |
类似说明 - ML688T |
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