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STW5098T 数据表(PDF) 21 Page - STMicroelectronics

部件名 STW5098T
功能描述  Dual low power asynchronous stereo audio Codec with integrated power amplifiers
PDF  85 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STW5098T 数据表(HTML) 21 Page - STMicroelectronics

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4.8
Audio digital interfaces
Four separate audio data interfaces are provided for AD and DA paths to have maximum
flexibility in communicating with other devices. The 4 interfaces can have different rates and
can work in different formats and modes (i.e an AD interface can be 8 kHz PCM slave while
a DA is 44.1 kHz I2S master).
The pins used by the interfaces are:
AD_SYNC, AD_CK and AD_DATA for AD paths word clock, bit clock and data, respectively,
and
DA_SYNC, DA_CK and DA_DATA for DA paths word clock, bit clock and data, respectively.
Data is exchanged with MSB first and left channel data first in all formats. Data word-length
is selected with bits DAWL in CR26 and ADWL in CR27. AD_DATA pin, outside the selected
time slot, is in the impedance condition selected by bit ADHIZ in CR28 in all data formats
except right aligned format.
In the following paragraphs SYNC, CK and DATA will be used when the distinction between
AD and DA is not relevant. When Master Mode is selected (bits DAMAST and ADMAST in
CR22 and CR25 respectively) the SYNC and CK clocks are generated internally. In addition,
an oversampled clock can be generated for each interface (AD_OCK and DA_OCK). The
clock is available in Slave Mode also, if needed.
The AD and DA interfaces can also be used as a single bidirectional interface when they are
configured with the same format (Delayed, DSP, etc.) and AD_SYNC is connected to
DA_SYNC and DA_CK to AD_CK. Master Mode is still available selecting ADMAST or
DAMAST (not both).
The interfaces features are controlled with control registers CR26, CR27 and CR28.
Supported operating formats:
Delayed format (I2S compatible) (DAFORM or ADFORM =000): the Audio Interface is
I2S compatible (
Figure 9 on page 54). The number of CK periods within one SYNC
period is not relevant, as long as enough CK periods are used to transfer the data and
the maximum frequency limit specified for bit clock is not exceeded. CK can be either a
continuous clock or a sequence of bursts. In master mode there are 32 CK periods per
SYNC period (that means 16 CK periods per channel) when the word length is 16 bit,
while there are 64 CK periods per SYNC period (or 32 CK periods per channel) when
word length is 18bit or higher. Bits ADSYNCP, DASYNCP and ADCKP, DACKP affect
the interface format inverting the polarity of SYNC and CK pins respectively.
Left aligned format (DAFORM or ADFORM =001): this format is equivalent to delayed
format without the 1 bit clock delay at the beginning of each frame (
Figure 9 on
page 54).
Right aligned format (DAFORM or ADFORM =010): this format is equivalent to
delayed format, except that the audio data is right aligned and that the number of CK
periods is fixed to 64 for each SYNC period (
Figure 9 on page 54).
DSP format (DAFORM or ADFORM =011) in this format the audio interface starting
from a frame sync pulse on SYNC receives (DA) or sends (AD) the left and right data
one after the other (
Figure 10 on page 55). The number of CK periods within one
SYNC period is not relevant, as long as enough CK periods are used to transfer the
data and the maximum frequency limit specified for bit clock is not exceeded. CK can
be either a continuous clock or a sequence of bursts. In Master Mode there are 32 CK
periods per SYNC period when the word length is 16 bit, while there are 64 CK periods
per SYNC period when word length is 18bit or higher. Bit CKP (ADCKP and DACKP)



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