L5980 datasheet(24/37 Pages) STMICROELECTRONICS

24 / 37 page

Application informations

L5980

24/37

The guidelines for positioning the poles and the zeroes and for calculating the component

values can be summarized as follow:

Choose a value for R1, usually between 1k and 5k, in order to have values of C4 and

C5 not comparable with parasitic capacitance of the board.

Choose a gain (R4/R1) in order to have the required bandwidth (BW), that means:

Equation 22

Where fESR is the ESR zero:

Equation 23

and Vs is the saw-tooth amplitude. The voltage feed forward keeps the ratio Vs/Vin

constant.

Calculate C4 by placing the zero one decade below the output filter double pole:

Equation 24

Then calculate C3 in order to place the second pole at four times the system bandwidth

(BW):

Equation 25

For example with VOUT=1.2V, VIN=12V, IO=0.7A, L=22µH, COUT=220µF, ESR=50mΩ, the

type II compensation network is:

In Figure 15 is shown the module and phase of the open loop gain. The bandwidth is about

35kHz and the phase margin is 49°.

ESR

------------

⎝⎠

⎛⎞

ESR

------------

--------- R

⋅⋅

⋅

ESR

π ESR C

OUT

⋅⋅

--------------------------------------------

π R

⋅⋅

-------------------------------

π R

4BW

⋅

–

⋅⋅⋅

--------------------------------------------------------------

1.1k

Ω

249

Ω

12k

Ω

47nF

68pF

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