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M41T94 数据表(PDF) 23 Page - STMicroelectronics |
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M41T94 数据表(HTML) 23 Page - STMicroelectronics |
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23 / 41 page ![]() M41T94 Clock operations 23/41 4.6 Power-on reset The M41T94 continuously monitors VCC. When VCC falls to the power fail detect trip point, the RST pulls low (open drain) and remains low on power-up for tREC after VCC passes VPFD (max). The RST pin is an open drain output and an appropriate pull-up resistor should be chosen to control rise time. 4.7 Reset inputs (RSTIN1 & RSTIN2) The M41T94 provides two independent inputs which can generate an output reset. The duration and function of these resets is identical to a reset generated by a power cycle. Table 7 on page 24 and Figure 13 on page 24 illustrate the AC reset characteristics of this function. Pulses shorter than tRLRH1 and tRLRH2 will not generate a reset condition. RSTIN1 and RSTIN2 are each internally pulled up to VCC through a 100kΩ resistor. Table 6. Square wave output frequency Square wave bits Square wave RS3 RS2 RS1 RS0 Frequency Units 0000 None – 0001 32.768 kHz 0010 8.192 kHz 0011 4.096 kHz 0100 2.048 kHz 0101 1.024 kHz 0110 512 Hz 0111 256 Hz 1000 128 Hz 1001 64 Hz 1010 32 Hz 1011 16 Hz 11008 Hz 11014 Hz 11102 Hz 11111 Hz |
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