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AS1528 数据表(PDF) 11 Page - ams AG |
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AS1528 数据表(HTML) 11 Page - ams AG |
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11 / 21 page ![]() www.austriamicrosystems.com Revision 1.00 11 - 21 AS1528/AS1529 Data Sheet - D e t a i l e d D e s c r i p t i o n Figure 18. Single Conversion – AIN1 vs. GND (AS1529), Unipolar Mode AIN+ vs. AIN- (AS1528) If AIN2 is selected (see Figure 19), drive CNVST high for at least 30ns. Next, drive CNVST low for at least 30ns, and then high again. This powers up the AS1529 and places the track/hold circuitry in track mode with AIN2 connected to the positive input capacitor. Next hold CNVST high for tACQ to fully acquire the signal. Drive CNVST low to place the track/hold circuitry in hold mode. The AS1529 then performs a conversion and shuts down automatically. The MSB is available at DOUT after 3.7µs. Data can then be clocked out using SCLK. Note: If all 12 bits of data are not clocked out before CNVST is driven high, AIN2 is selected for the next conversion. Selecting Unipolar or Bipolar Conversions (AS1528) True-differential conversion (with the AS1528 unipolar and bipolar modes) is selected using pin CNVST (see page 3). AIN+ and AIN- are sampled at the falling edge of CNVST. In unipolar mode, AIN+ can exceed AIN- by up to VREF. The output format is straight binary. In bipolar mode, either input can exceed the other by up to VREF/2. The output format is two’s complement. In both modes, the input common mode range can go from GND to VDD. Figure 19. Single Conversion – AIN2 vs. GND (AS1529), Bipolar Mode AIN+ vs. AIN- (AS1528) Note: In unipolar and bipolar modes, AIN+ and AIN- must not exceed VDD by more than 50mV or be lower than GND by more than 50mV. If unipolar mode is selected (see Figure 18), drive CNVST high to power up the AS1528 and place the track/hold cir- cuitry in track mode with AIN+ and AIN- connected to the input capacitors. Hold CNVST high for tACQ to fully acquire the signal. Drive CNVST low to place the track/hold circuitry in hold mode. The AS1528 then performs a conversion and shutdown automatically. The MSB is available at DOUT after 3.7µs. Data can then be clocked out using SCLK. Clock out all 12 bits of data before driving CNVST high for the next conversion. If all 12 bits of data are not clocked out before CNVST is driven high, bipolar mode is selected for the next conversion. If bipolar mode is selected (see Figure 19), drive CNVST high for at least 30ns. Next, drive CNVST low for at least 30ns and then high again. This places the track/hold circuitry in track mode with AIN+ and AIN- connected to the input capacitors. Next hold CNVST high for tACQ to fully acquire the signal. Drive CNVST low to place the track/hold circuitry in hold mode. The AS1528 then performs a conversion and shuts down automatically. The MSB is available at DOUT after 3.7µs. Data can then be clocked out using SCLK. Note: If all 12 bits of data are not clocked out before CNVST is driven high, bipolar mode is selected for the next con- version. SCLK CNVST Sampling Instant tCONV tACQ 1 4 8 12 DOUT High Z High Z B8 B7 B6 B5 B4 B3 B2 B1 B9 MSB B0 LSB ZERO ZERO DOUT SCLK CNVST B8 B7 B6 B5 B4 B3 B2 B1 B9 MSB B0 LSB Sampling Instant tCONV tACQ 1 4 8 12 High Z High Z ZERO ZERO |
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