RT9245CPC datasheet(13/25 Pages) RICHTEK

13 / 25 page

RT9245C

DS9245C-02 March 2007

www.richtek.com

Application Information

RT9245C is a multi-phase DC/DC controller that precisely

regulates CPU core voltage and balances the current of

different power channels. The converter consisting of

RT9245C and its companion MOSFET driver RT9619

provides high quality CPU power and all protection

functions to meet the requirement of modern VRM.

Voltage Control

RT9245C senses the CPU VCORE by SGND pin to sense

the return of CPU to minimize the voltage drop on PCB

trace at heavy load. OVP is sensed at FB pin. The internal

high accuracy VIDDAC provides the reference voltage for

VRD10.x compliance. Control loop consists of error

amplifier, multi-phase pulse width modulator, driver and

power components. As conventional voltage mode PWM

controller, the output voltage is locked at the VREF of error

amplifier and the error signal is used as the control signal

of pulse width modulator. The PWM signals of different

channels are generated by comparison of EA output and

split-phase sawtooth wave. Power stage transforms VIN

to output by PWM signal on-time ratio.

Current Balance

RT9245C senses the inductor current via inductor's DCR

for channel current balance and droop tuning. The

differential sensing GM amplifier converts the voltage on

the sense component (can be a sense resistor or the

DCR of the inductor) to current signal into internal balance

circuit.

The current balance circuit sums and averages the current

signals and then produces the balancing signals injected

to pulse width modulator. If the current of some power

channel is larger than average, the balancing signal

reduces that channels pulse width to keep current balance.

The use of single GM amplifier via time sharing technique

to sense all inductor currents can reduce the offset errors

and linearity variation between GMs. Thus it can greatly

improve signal processing especially when dealing with

such small signal as voltage drop across DCR.

Droop & Load Line Setting

RT9245C injects averaged current IX into the resistor RADJ

connected to ADJ pin to generate a load-current-

dependent voltage RADJ for droop setting :

where N is the phase number of operation.

VADJ is then subtracted from VID_DAC output as the real

reference voltage at non-inverting input of the error amplifier

as shown if Figure 1. Consequently, load line slope is

calculated as :

Fault Detection

The chip detects FB for over voltage and power good

detection. The “hiccup mode” operation of over current

protection is adopted to reduce the short circuit current.

The in-rush current at the start up is suppressed by the

soft start circuit through clamping the pulse width and

output voltage.

Phase Setting and Converter Start Up

RT9245C interfaces with companion MOSFET drivers (like

RT9619, RT9607 series) for correct converter initialization.

The tri-state PWM output (high, low and high impedance)

senses its interface voltage when IC POR acts (both VCC

and DVD trip). The channel is enabled if the pin voltage is

1.2V less than VCC. Tie the PWM to VCC and the

corresponding current sense pins to GND or left float if

the channel is unused. For example, for 3-Channel

application, connect PWM4 high.

Current Sensing Setting

RT9245C senses the current flowing through inductor via

its DCR for channel current balance and droop tuning.

IVOSS /4

RCSN

VCORE

DAC

RADJ

VADJ

8IX

Figure 1. Load Line and Offset Function

ADJ

CSN

ADJ

CORE

DCR

ΔI

ΔV

Line

Load

RT9245CPC 数据表(PDF) 13 Page - Richtek Technology Corporation

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