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RT9702PB 数据表(PDF) 2 Page - Richtek Technology Corporation |
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RT9702PB 数据表(HTML) 2 Page - Richtek Technology Corporation |
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2 / 16 page ![]() RT9702/A 2 DS9702/A-11 June 2007 www.richtek.com Function Block Diagram Functional Pin Description Pin Name Pin Function VIN Power Input Voltage VOUT Output Voltage GND Ground EN Chip Enable (Active High) FLG Open-Drain Fault Flag Output Gate Control Output Voltage Detection Delay Oscillator UVLO Charge Pump Bias Thermal Protection Current Limiting FLG VOUT VIN EN GND Typical Application Circuit Note: A low-ESR 150 μF aluminum electrolytic or tantalum between VOUT and GND is strongly recommended to meet the 330mV maximum droop requirement in the hub VBUS. (see Application Information Section for further details) VIN EN FLG VOUT GND RT9702/A Over -Current V BUS D+ D- GND 0.1uF 10K USB Controller 1uF 150uF 10uF Supply Voltage 5V Pull-Up Resistor (10K to 100K) (Optional) Flag Transient Filtering) Ferrite Beades Data Chip Enable Pin Configurations (TOP VIEW) EN 23 54 1 GND FLG VIN VOUT SOT-23-5/TSOT-23-5 |
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