Advanced CMOS Logic – 74AC573

8-bit transparent D-Type Latch with 3-State Outputs in bare die form

Rev 1.0

19/3/2021



Outputs Source/Sink 24mA



Low input current: 1µA



3-State outputs



Outputs directly interface CMOS, NMOS and TTL



Operating voltage range: 2.0V to 6.0V



Lower power consumption & higher speed



Function compatible with 74HC573



Full military temperature range.

Features:

Ordering Information

The following part suffixes apply:



No suffix - MIL-STD-883 /2010B Visual Inspection

The74AC573 consists of eight D-type transparent latches

fabricated using a 1.5µm 5V CMOS process to combine

high speed performance LSTTL performance with CMOS

low power consumption. Each latch is equipped with

separate D-Type inputs and 3-State outputs for bus

oriented applications. Data output changes asynchronously

and data may be latched even when the outputs are not

enabled. Inputs accept standard CMOS outputs or LSTTL

outputs using pull-up resistors. Inputs are also equipped

with protection circuits against static discharge and

transient excess voltage.

Description

Die Dimensions in µm (mils)

1450 (57)

For High Reliability versions of this product please see

54AC573

Supply Formats:

Mechanical Specification



Default – Die in Waffle Pack (100 per tray capacity)

1450 x 1650

µm

Die Size (Unsawn)

57 x 65

mils



Sawn Wafer on Tape – On request

120 x 120

µm

Minimum Bond Pad Size

4.72 x 4.72

mils



Unsawn Wafer – On request



Die Thickness <> 350µm(14 Mils) – On request

350 (±20)

µm

Die Thickness

13.78 (±0.79)

mils

Top Metal Composition

Al 1%Si 1.1µm



Assembled into Ceramic Package – On request

Back Metal Composition

N/A – Bare Si

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