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MU9C8328-RDC 数据表(PDF) 6 Page - MUSIC Semiconductors |
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MU9C8328-RDC 数据表(HTML) 6 Page - MUSIC Semiconductors |
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6 / 16 page ![]() MU9C8328 Ethernet Interface Rev. 4a 6 FUNCTIONAL DESCRIPTION Contined Table 1: Address Decode A(2–0) 0H 0H 1H 1H 2H 2H 3H 3H 4H 4H 5H 5H 6H 6H 7H 7H /WE L H L H L H L H L H L H L H L H Resource Selected Control Register Control Register Reserved Status Register Learn Op-Code Register Learn Op-Code Register Reserved Associated Data Register LANCAM Command Cycle with /EC LOW LANCAM Command Cycle with /EC LOW LANCAM Command Cycle with /EC HIGH LANCAM Command Cycle with /EC HIGH LANCAM Data Cycle with /EC LOW LANCAM Data Cycle with /EC LOW LANCAM Data Cycle with /EC HIGH LANCAM Data Cycle with /EC HIGH Action Write Read Read Write Read Read Write Read Write Read Write Read Write Read Figure 1: Typical Network Filtering P r eam ble S FD DA 1 S A2 Dat a Length /Type S E RDAT DA 2 DA 3 S A1 S A3 /E /W /CM /E C /M F /REJEC T /INT DA M at ch Fou nd S A No-M a tch/Lea r n |
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