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MB96F348CSAPMC-GE2 数据表(PDF) 63 Page - fujitsu semiconductor |
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MB96F348CSAPMC-GE2 数据表(HTML) 63 Page - fujitsu semiconductor |
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63 / 159 page  Preliminary Specification MB96300 FME/EMDC- 2007-02-12 MB96300_shortspec.fm 63 s I/O MAP Table 0-1 I/O map (1 / 53) Address Register Abbreviation 8-bit access Abbreviation 16-bit access Access 000000H I/O Port - Port Data Register Port 00 PDR00 RW 000001H I/O Port - Port Data Register Port 01 PDR01 RW 000002H I/O Port - Port Data Register Port 02 PDR02 RW 000003H I/O Port - Port Data Register Port 03 PDR03 RW 000004H I/O Port - Port Data Register Port 04 PDR04 RW 000005H I/O Port - Port Data Register Port 05 PDR05 RW 000006H I/O Port - Port Data Register Port 06 PDR06 RW 000007H I/O Port - Port Data Register Port 07 PDR07 RW 000008H I/O Port - Port Data Register Port 08 PDR08 RW 000009H I/O Port - Port Data Register Port 09 PDR09 RW 00000AH I/O Port - Port Data Register Port 10 PDR10 RW 00000BH I/O Port - Port Data Register Port 11 PDR11 RW 00000CH I/O Port - Port Data Register Port 12 PDR12 RW 00000DH I/O Port - Port Data Register Port 13 PDR13 RW 00000EH I/O Port - Port Data Register Port 14 PDR14 RW 00000FH I/O Port - Port Data Register Port 15 PDR15 RW 000010H I/O Port - Port Data Register Port 16 PDR16 RW 000011H I/O Port - Port Data Register Port 17 PDR17 RW 000018H ADC - Control Status Register 0 Low ADCSL ADCS RW 000019H ADC - Control Status Register 0 High ADCSH RW 00001AH ADC - Data register 0 Low ADCRL ADCR R 00001BH ADC - Data register 0 High ADCRH RW 00001CH ADC - Setting Register 0 Low ADSRL ADSR RW 00001DH ADC - Setting Register 0 High ADSRH RW 00001EH ADC - Extended configuration register ADECR RW 000020H FRT - Data register of free-running timer 0 TCDT0 RW 000021H FRT - Data register of free-running timer 0 RW 000022H FRT - Control status register of free- running timer 0 TCCSL0 TCCS0 RW |
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