LPC2220 datasheet(21/49 Pages) NXP

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LPC2210_2220_4

Product data sheet

Rev. 04 — 2 October 2007

21 of 49

NXP Semiconductors

LPC2210/2220

16/32-bit ARM microcontrollers with external memory interface

6.8 Pin function select register 2 (PINSEL2 - 0xE002 C014)

The PINSEL2 register controls the functions of the pins as per the settings listed in

Table 9. The direction control bit in the IODIR register is effective only when the GPIO

function is selected for a pin. For other functions direction is controlled automatically.

Settings other than those shown in Table 9 are reserved, and should not be used.

Table 9.

Pin function select register 2 (PINSEL2 - 0xE002 C014)

PINSEL2 bits

Description

Reset value

1:0

reserved

When 0, pins P1[36:26] are used as GPIO pins. When 1, P1[31:26] are used as a

Debug port.

P1.26/RTCK

When 0, pins P1[25:16] are used as GPIO pins. When 1, P1[25:16] are used as a

Trace port.

P1.20/

TRACESYNC

5:4

Controls the use of the data bus and strobe pins:

BOOT1:0

Pins P2[7:0]

11 = P2[7:0]

0x or 10 = D7 to D0

Pin P1.0

11 = P1.0

0x or 10 = CS0

Pin P1.1

11 = P1.1

0x or 10 = OE

Pin P3.31

11 = P3.31

0x or 10 = BLS0

Pins P2[15:8]

00 or 11 = P2[15:8]

01 or 10 = D15 to D8

Pin P3.30

00 or 11 = P3.30

01 or 10 = BLS1

Pins P2[27:16]

0x or 11 = P2[27:16]

10 = D27 to D16

Pins P2[29:28]

0x or 11 = P2[29:28]

10 = D29, D28

Pins P2[31:30]

0x or 11 = P2[31:30] or AIN5 to

AIN4

10 = D31, D30

Pins P3[29:28]

0x or 11 = P3[29:28] or AIN7 to

AIN6

10 = BLS2, BLS3

If bits 5:4 are not 10, controls the use of pin P3.29: 0 enables P3.29, 1 enables

AIN6.

If bits 5:4 are not 10, controls the use of pin P3.28: 0 enables P3.28, 1 enables

AIN7.

Controls the use of pin P3.27: 0 enables P3.27, 1 enables WE.

10:9

reserved

Controls the use of pin P3.26: 0 enables P3.26, 1 enables CS1.

reserved

If bits 27:25 are not 111, controls the use of pin P3.23/A23/XCLK: 0 enables P3.23,

1 enables XCLK.

15:14

Controls the use of pin P3.25: 00 enables P3.25, 01 enables CS2, 10 and 11 are

reserved values.

17:16

Controls the use of pin P3.24: 00 enables P3.24, 01 enables CS3, 10 and 11 are

reserved values.

19:18

reserved

If bits 5:4 are not 10, controls the use of pin P2[29:28]: 0 enables P2[29:28], 1 is

reserved

If bits 5:4 are not 10, controls the use of pin P2.30: 0 enables P2.30, 1 enables

AIN4.

If bits 5:4 are not 10, controls the use of pin P2.31: 0 enables P2.31, 1 enables

AIN5.

LPC2220 数据表(PDF) 21 Page - NXP Semiconductors

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LPC2220 数据表(PDF) 21 Page - NXP Semiconductors

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