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SM5956AF 数据表(PDF) 21 Page - Nippon Precision Circuits Inc |
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SM5956AF 数据表(HTML) 21 Page - Nippon Precision Circuits Inc |
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21 / 27 page ![]() SM5956A SEIKO NPC CORPORATION —21 Group Propagation Delay tINPUT : Serial input data (fsi rate) read end timing (LRCI clock rising edge) tOUTPUT : Serial output data (fso rate) output start timing (LRCO clock rising edge) Cratio : Sample rate conversion ratio (fsi/fso) tOUTPUT − tINPUT = ((51.791 × Cratio + 41.557) ± 36)/fso (at SCKSLN = H, 768fso operation) tOUTPUT − tINPUT = ((51.122 × Cratio + 38.647) ± 36)/fso (at SCKSLN = L, 512fso operation) Response Time A certain amount of time is required to calculate the sample rate conversion ratio in the conversion rate detec- tor. Assuming as a prerequisite that the SM5956A is supplied with a stable input-system sampling frequency (fsi: input on LRCI) and a stable output-system sampling frequency (fso: derived from the SCK clock), the time required after system reset to determine the sample rate conversion ratio with 16-bit precision is defined as the minimum response time, given by: Response time = 28140/fso (638ms at fso = 44.1kHz) Input frequency fsi [kHz] Output frequency fso [kHz] Response time [ms] SCKSLN = L SCKSLN = H 32 44.1 594 285 32 48 557 263 44.1 32 822 406 44.1 48 473 228 48 32 799 403 48 44.1 478 302 32 32 447 395 44.1 44.1 325 287 48 48 298 264 Serial data input 1/fsi tINPUT 1/fso Serial data output t OUTPUT tINPUT t OUTPUT − tINPUT t OUTPUT − t OUTPUT tINPUT Data waveform image |
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