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TS3121AIYCT 数据表(PDF) 20 Page - STMicroelectronics |
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TS3121AIYCT 数据表(HTML) 20 Page - STMicroelectronics |
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20 / 34 page ![]() 5 Application information Overview The TS3121 has an embedded fail-safe architecture. This feature allows power saving by dynamically turning on and off the comparator as needed during operation. Due to the fail-safe design, the input and output pins can stay biased while the power supply is disconnected (VCC = 0 V). The open-drain output stage allows the comparator to be used in level shifting applications, where the output voltage range is independent from the supply. Figure 47. Functional block diagram Bias + – V+ IN+ IN– OUT V- Operating voltages The TS3121 can operate from 1.7 V to 5.5 V and parameters are fully specified at 1.8 V, 3.3 V, and 5 V. The specifications are guaranteed in the extended temperature range of -40 to +125 °C. The TS3121 features an open-drain output stage that is decoupled from VCC. This allows output voltages from 0 V to 5.5 V, independent of VCC. The rail-to-rail input stage is also decoupled from VCC, allowing the comparator to sustain input common- mode voltages from 0 V to 5.5 V and independent of VCC. Input offset voltage drift versus temperature The input voltage drift variation versus temperature is defined as the offset variation related to the offset value measured at 25 °C. The signal chain accuracy at 25 °C can be compensated during the production at the application level. The maximum input voltage drift over the temperature enables the system designer to anticipate the effect of temperature variations. ΔVioΔV=maxVioT −Vio25°C T−25°C (1) Where T = -40 °C and +125 °C. The datasheet maximum value is guaranteed by a measurement on a representative sample size ensuring a Cpk (process capability index) greater than 1.3. The datasheet reports the absolute worst-case value between -40 °C and +125 °C. Resistor values for high-speed design TS3121, TS3121A Application information DS14484 - Rev 2 page 20/34 |
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