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LD49300 数据表(PDF) 5 Page - STMicroelectronics |
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LD49300 数据表(HTML) 5 Page - STMicroelectronics |
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5 / 20 page ![]() LD49300 Pin configuration 5/20 3 Pin configuration Table 1. Pin description Figure 5. Pin connections (top view) Pln n° Symbol Note 1 EN Enable (Input): Logic High = Enable, Logic Low = Shutdown. ADJ Adjustable regulator feedback input. Connect to resistor voltage divider. 2 VIN Input voltage which supplies current to the output power device. 3 GND Ground (TAB is connected to ground). 4 VOUT Regulator output. 5 VBIAS Input bias voltage for powering all circuitry on the regulator with the exception of the output power device. |
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