ADL5531

Rev. 0 | Page 9 of 12

BASIC CONNECTIONS

The basic connections for operating the ADL5531 are shown

in Figure 15. The input and output are ac-coupled with 10 nF

(0402) capacitors. DC bias is provided to the amplifier via an

inductor (Coilcraft 1008CS-471XJLC or equivalent) connected

to the RFOUT pin. The bias voltage should be decoupled using

10 nF and 1 μF capacitors.

SOLDERING INFORMATION AND RECOMMENDED

PCB LAND PATTERN

Figure 14 shows the recommended land pattern for ADL5531.

To minimize thermal impedance, the exposed paddle on the

package underside is soldered down to a ground plane. If

multiple ground layers exist, they are stitched together using

vias (a minimum of five vias is recommended). Pin 1, Pin 3,

Pin 4, Pin 6 and Pin 8 can be left unconnected or can be

connected to ground. Connecting these pins to ground slightly

enhances thermal impedance. For more information on land

pattern design and layout, refer to Application Note AN-772, A

Design and Manufacturing Guide for the Lead Frame Chip Scale

Package (LFCSP).

1.53mm

2.03mm

4

5

8

0.71mm

1

Figure 14. Recommended Land Pattern

5

CLIN

8

NC

NC

NC = NO CONNECT

RFIN

RFOUT

L1

470nH

4

6

NC

RFIN

2

7

RFOUT

NC

3

NC

ADL5531

1

C1

10nF

C3

1nF

C5

10nF

C2

10nF

C6

1µF

VPOS

(TESTLOOP RED)

GND

(TESTLOOP BLACK)

W1

Figure 15. Basic Connections