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STR750FV2 数据表(PDF) 63 Page - STMicroelectronics |
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STR750FV2 数据表(HTML) 63 Page - STMicroelectronics |
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63 / 84 page ![]() STR750Fxx STR751Fxx STR752Fxx STR755Fxx Electrical parameters 63/84 Figure 28. SPI configuration - master mode, single transfer Figure 29. SPI configuration - master mode, continuous transfer, CPHA=0 Figure 30. SPI configuration - master mode, continuous transfer, CPHA=1 NSS OUTPUT CPHA=0 MOSI OUTPUT MISO INPUT CPHA=0 CPHA=1 CPHA=1 tc(SCK) tw(SCKH) tw(SCKL) th(MISO) tsu(MISO) tSCKQV tSCKQX MSB IN MSB OUT BIT IN BIT OUT LSB OUT LSB IN CPOL=0 CPOL=1 CPOL=0 CPOL=1 tr(SCK) tf(SCK) tNSSLQV tSCKNSSH (CPHA=0) sample edge trigger edge sample edge trigger edge trigger edge trigger edge sample edge sample edge tSCKQX tSCKNSSH (CPHA=1) 1 OR 0 DONT CARE DONT CARE 1 OR 0 NSS OUTPUT sample MOSI OUTPUT MISO INPUT trigger MSB IN MSB OUT sample trigger sample trigger sample trigger sample trigger LSB IN LSB OUT sample trigger MSB IN MSB OUT sample DONT CARE DONT CARE 1.5*tc(SCK) tc(SCK) CPOL=0 CPOL=1 FRAME 1 FRAME 2 1 OR 0 tNSSLQV tNSSLQV NSS OUTPUT trigger MOSI OUTPUT MISO INPUT sample MSB IN MSB OUT trigger sample trigger sample trigger samlpe trigger sample LSB IN LSB OUT trigger sample MSB IN MSB OUT trigger DONT CARE tc(SCK) CPOL=0 CPOL=1 FRAME 1 FRAME 2 sample trigger sample trigger 1 OR 0 |
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