www.ti.com

FEATURES

Seemechanicaldrawingsfordimensions.

DBVPACKAGE

(TOP VIEW)

5

1

V

CC

D

2

CLK

3

4

GND

Q

DCKPACKAGE

(TOP VIEW)

2

CLK

3

4

GND

V

CC

5

D

Q

1

YZP PACKAGE

(BOTTOMVIEW)

2

CLK

V

CC

1 5

D

GND

4

3

Q

DESCRIPTION/ORDERING INFORMATION

SN74LVC1G80

SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP

SCES221Q – APRIL 1999 – REVISED JANUARY 2007

• Available in the Texas Instruments

• Latch-Up Performance Exceeds 100 mA Per

NanoFree™ Package

JESD 78, Class II

• Supports 5-V V

• ESD Protection Exceeds JESD 22

• Inputs Accept Voltages to 5.5 V

–

2000-V Human-Body Model (A114-A)

• Max t

–

200-V Machine Model (A115-A)

• Low Power Consumption, 10-µA Max I

CC

–

1000-V Charged-Device Model (C101)

• ±24-mA Output Drive at 3.3 V

• I

Operation

When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on the

positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the

rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without

affecting the level at the output.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the

package.

preventing damaging current backflow through the device when it is powered down.

ORDERING INFORMATION

ORDERABLE PART NUMBER

NanoFree™ – WCSP (DSBGA)

Reel of 3000

SN74LVC1G80YZPR

_ _ _CX_

0.23-mm Large Bump – YZP (Pb-free)

Reel of 3000

SN74LVC1G80DBVR

SOT (SOT-23) – DBV

C80_

–40°C to 85°C

Reel of 250

SN74LVC1G80DBVT

Reel of 3000

SN74LVC1G80DCKR

SOT (SC-70) – DCK

CX_

Reel of 250

SN74LVC1G80DCKT

(1)

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

(2)

DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.

YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following

character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb,

• = Pb-free).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

NanoFree is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Copyright © 1999–2007, Texas Instruments Incorporated

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.