6.12

When should the HAL be used versus LL drivers?

HAL drivers offer high-level and function-oriented APIs, with a high level of portability. Product/IPs complexity is

hidden for end users.

LL drivers offer low-layer register level APIs, with a better optimization but less portable. They require in depth

knowledge of product/IPs specifications.

6.13

How can LL drivers be included in an existing environment? Is there any LL

configuration file as for HAL?

There is no configuration file. Source code shall directly include the necessary stm32u5xx_ll_ppp.h file(s).

6.14

Can HAL and LL drivers be used together? If yes, what are the constraints?

It is possible to use both HAL and LL drivers. Use the HAL for the IP initialization phase and then manage the I/O

operations with LL drivers.

The major difference between HAL and LL is that HAL drivers require to create and use handles for operation

management while LL drivers operates directly on peripheral registers. The mixing of HAL and LL is illustrated in

the "Examples_MIX" example.

6.15

Are there any LL APIs that are not available with HAL?

Yes, there are. A few Cortex® APIs have been added in stm32u5xx_ll_cortex.h, for instance for accessing SCB or

SysTick registers.

6.16

Why are SysTick interrupts not enabled on LL drivers?

When using LL drivers in standalone mode, there is no need to enable SysTick interrupts because they are not

used in LL APIs, while HAL functions require SysTick interrupts to manage timeouts.

6.17

How are LL initialization APIs enabled?

The definition of LL initialization APIs and associated resources (structures, literals, and prototypes) is conditioned

by the USE_FULL_LL_DRIVER compilation switch.

To be able to use LL initialization APIs, add this switch in the toolchain compiler preprocessor.

6.18

How can STM32CubeMX generate code based on embedded software?

STM32CubeMX has a built-in knowledge of STM32 microcontrollers including their peripherals and software. It

enables providing a graphical representation to the user and generate *.h/*.c files based on user configuration.

6.19

How to get regular updates on the latest STM32CubeU5 MCU Package

releases?

Refer to Getting release updates.

6.20

What is an LPBAM mechanism?

The LPBAM mechanism is a subsystem that operates independently from low power mode and without any

software running (CPU intervention).

The low power mode depends on products integration.

6.21

Is the LPBAM based on the DMA "tasks" used to configure the peripherals?

The LPBAM is based on DMA transfers stored on linked-list nodes to configure partially autonomous peripherals.

6.22

How are managed the priorities between LPBAM and others DMA transfer?

The LPBAM is based on DMA transfer. The same DMA channels priority arbitration principle applies.

UM2883

FAQ

UM2883 - Rev 4

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