M48T35AV

Operation modes

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The state of the eight three-state Data I/O signals is controlled by E and G. If the outputs are

the Address Inputs are changed while E and G remain active, output data will remain valid

Figure 5.

Read mode AC waveforms

Note:

WRITE Enable (W) = High.

Table 3.

Read mode AC characteristics

AI00925

tAVAV

tAVQV

tAXQX

tELQV

tELQX

tEHQZ

tGLQV

tGLQX

tGHQZ

VALID

A0-A14

E

G

DQ0-DQ7

VALID

Symbol

1.

M48T35AV

Unit

–100

Min

Max

READ cycle time

100

ns

Address valid to output valid

100

ns

Chip enable low to output valid

100

ns

Output enable low to output valid

50

ns

(2)

2.

Chip enable low to output transition

10

ns

(2)

Output enable low to output transition

5

ns

(2)

Chip enable high to output Hi-Z

50

ns

(2)

Output enable high to output Hi-Z

40

ns

Address transition to output transition

10

ns