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ST72F521 数据表(PDF) 129 Page - STMicroelectronics |
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ST72F521 数据表(HTML) 129 Page - STMicroelectronics |
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129 / 215 page  ST72F521, ST72521B 129/215 10.8 CONTROLLER AREA NETWORK (CAN) 10.8.1 Introduction This peripheral is designed to support serial data exchanges using a multi-master contention based priority scheme as described in CAN specification Rev. 2.0 part A. It can also be connected to a 2.0 B network without problems, since extended frames are checked for correctness and acknowledged accordingly although such frames cannot be trans- mitted nor received. The same applies to overload frames which are recognized but never initiated. Figure 68. CAN Block Diagram TX/RX Buffer 1 10 Bytes TX/RX Buffer 2 10 Bytes TX/RX Buffer 3 10 Bytes ID Filter 0 4 Bytes ID Filter 1 4 Bytes ST7 Interface PSR ICR ISR BRPR CSR TECR RECR CAN 2.0B passive Core SHREG BCDL CRC BTL RX TX EML ST7 Internal Bus BTR |
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