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TC74VCX573FK 数据表(PDF) 2 Page - Toshiba Semiconductor

部件名 TC74VCX573FK
功能描述  Low-Voltage Octal D-Type Latch with 3.6 V Tolerant Inputs and Outputs
PDF  13 Pages
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制造商  TOSHIBA [Toshiba Semiconductor]
网页  http://www.semicon.toshiba.co.jp/eng
标志 TOSHIBA - Toshiba Semiconductor

TC74VCX573FK 数据表(HTML) 2 Page - Toshiba Semiconductor

  TC74VCX573FK Datasheet HTML 1Page - Toshiba Semiconductor TC74VCX573FK Datasheet HTML 2Page - Toshiba Semiconductor TC74VCX573FK Datasheet HTML 3Page - Toshiba Semiconductor TC74VCX573FK Datasheet HTML 4Page - Toshiba Semiconductor TC74VCX573FK Datasheet HTML 5Page - Toshiba Semiconductor TC74VCX573FK Datasheet HTML 6Page - Toshiba Semiconductor TC74VCX573FK Datasheet HTML 7Page - Toshiba Semiconductor TC74VCX573FK Datasheet HTML 8Page - Toshiba Semiconductor TC74VCX573FK Datasheet HTML 9Page - Toshiba Semiconductor Next Button
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TC74VCX573FT/FK
2007-10-19
2
Pin Assignment (top view)
IEC Logic Level
Truth Table
Inputs
OE
LE
D
Outputs
H
X
X
Z
L
L
X
Qn
L
H
L
L
L
H
H
H
X: Don’t care
Z: High impedance
Qn: Q outputs are latched at the time when the LE inputs is taken to a low logic level.
System Diagram
VCC
20
Q0
Q1
Q2
Q3
Q4
19
18
17
16
15
14
OE
1
2
3
4
5
6
7
D0
D1
D2
D3
D4
D5
Q5
8
9
10
D6
D7
GND
13
12
11
Q6
Q7
LE
(1)
(11)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
(19)
(18)
(17)
(16)
(15)
(14)
(13)
(12)
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
EN
1D
C1
OE
LE
D0
D1
D2
D3
D4
D5
D6
D7
LE
OE
Q1
1
11
2
19
Q2
3
18
Q3
4
17
Q4
5
16
Q5
6
15
Q6
7
14
Q7
8
13
L
Q
D
L
Q
D
L
Q
D
L
Q
D
L
Q
D
L
Q
D
L
Q
D
D1
D2
D3
D4
D5
D6
D7
9
12
L
Q
D
Q0
D0



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