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TC74VCX2373FT 数据表(PDF) 2 Page - Toshiba Semiconductor

部件名 TC74VCX2373FT
功能描述  Low-Voltage Octal D-Type Latch with 3.6-V Tolerant Inputs and Outputs
PDF  11 Pages
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制造商  TOSHIBA [Toshiba Semiconductor]
网页  http://www.semicon.toshiba.co.jp/eng
标志 TOSHIBA - Toshiba Semiconductor

TC74VCX2373FT 数据表(HTML) 2 Page - Toshiba Semiconductor

  TC74VCX2373FT Datasheet HTML 1Page - Toshiba Semiconductor TC74VCX2373FT Datasheet HTML 2Page - Toshiba Semiconductor TC74VCX2373FT Datasheet HTML 3Page - Toshiba Semiconductor TC74VCX2373FT Datasheet HTML 4Page - Toshiba Semiconductor TC74VCX2373FT Datasheet HTML 5Page - Toshiba Semiconductor TC74VCX2373FT Datasheet HTML 6Page - Toshiba Semiconductor TC74VCX2373FT Datasheet HTML 7Page - Toshiba Semiconductor TC74VCX2373FT Datasheet HTML 8Page - Toshiba Semiconductor TC74VCX2373FT Datasheet HTML 9Page - Toshiba Semiconductor Next Button
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TC74VCX2373FT/FK
2007-10-19
2
Pin Assignment (top view)
IEC Logic Symbol
Truth Table
Inputs
OE
LE
D
Outputs
H
X
X
Z
L
L
X
Qn
L
H
L
L
L
H
H
H
X: Don’t care
Z: High impedance
Qn: Q outputs are latched at the time when the LE input is taken to a low logic level.
System Diagram
LE
OE
1
11
3
2
L Q
D
Q0
D0
D1
D2
D3
D5
D6
D4
D7
4
7
8
13
14
17
18
5
Q1
6
Q2
9
Q3
12
Q4
15
Q5
16
Q6
19
Q7
L Q
D
L Q
D
L Q
D
L Q
D
L Q
D
L Q
D
L Q
D
VCC
20
Q7
D7
D6
19
18
17
16
15
14
OE
1
2
3
4
5
6
7
D1
Q1
Q2
D2
D3
Q3
Q6
8
9
10
D4
Q4
GND
13
12
11
Q5
D5
LE
Q0
D0
1
11
3
4
7
8
13
14
17
18
2
5
6
9
12
15
16
19
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
EN
1D
C1
OE
LE
D0
D1
D2
D3
D4
D5
D6
D7



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