ACT43750 datasheet(21/43 Pages) QORVO

21 / 43 page

Data Sheet Rev. F, February 10, 2025 | Subject to change without notice

21 of 43

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ACT43750

RF POL Drain-Switch Driver / Gate-bias Regulator

V50 Discharge

The IC only enters this state when the system uses

Qorvo’s ACT43850 to generate the RF PA drain voltage.

When the IC receives a command to disable REGG, it

moves to this state to activate the IDRAIN Calibrator block

to discharge the drain supply voltage node before it dis-

ables REGG.

REGG Shutdown

As a result of the REGG disable event, the IC drives the

DACG toward 0 V (zero). This state does the opposite

of the soft start.

Bias Error

When the IC detects an error, it immediately turns off

REGG and turns off the external RF PA drain FET. The

IC turns off the RFPA drain voltage and then turns off

the REGG gate voltage. It stays in this state until the

12V bias voltage at V12 is cycled off and back on. I2C

is still active in this state. The following faults force the

IC into this state:

5V Bias Regulator under-voltage

V12 under-voltage

V12 over-voltage

Floating 5V Bias Regulator under-voltage

Low-side Gate Drive Regulator under-voltage

High-side Gate Drive Regulator under-voltage

Thermal shutdown, TSD

External Clock Synchronization error

REGG under-voltage

REGG over-current

5-bit ADC read error

Operation Frequency Selection / RRT read error

ACT43750 数据表(PDF) 21 Page - Qorvo, Inc

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