Evaluation Board User Guide

ADPL42002 Evaluation

Boards

analog.com

Rev. 0

4 of 12

Performance Summary

Specifications are at TA = +25°C, unless otherwise noted.

Table 1. Performance Summary of the LFCSP Package Evaluation Board

PARAMETER

SYMBOL

TEST CONDITIONS/COMMENTS

MIN

TYP

MAX

UNIT

Input Voltage Range

VIN

IOUT = 10mA, VOUT = 3.3V

3.8

20

V

IOUT = 200mA, VOUT = 3.3V

3.8

7.81

V

Output Voltage

VOUT

VIN = 5V, IOUT = 200mA, R1 = 17.4kΩ,

R2 = 10kΩ

3.22

3.29

3.36

V

Feedback Divider Current

IFB

JP1 = pins 2-3, JP2 = pins 1-2, R1 = 17.4kΩ,

R2 = 10kΩ

120

µA

Shutdown Input Current

IGND_SD

JP1 = pins 1-2, VIN = 4.3V, EN = GND

1.8

µA

1 The maximum power dissipation and, consequently, the maximum input voltage for an output that is programmed to

3.3V with a 200mA load is determined by the 60°C temperature rise of the ADPL42002 on the evaluation board. In

addition, consider the effect of ambient temperature and the maximum junction temperature that may occur. Refer to

the ADPL42002 data sheet for more information.

Table 2. Performance Summary of the SOIC Package Evaluation Board

PARAMETER

SYMBOL

TEST CONDITIONS/COMMENTS

MIN

TYP

MAX

UNIT

Input Voltage Range

VIN

IOUT = 10mA, VOUT = 3.3V

3.8

20

V

IOUT = 200mA, VOUT = 3.3V

3.8

9.471

V

Output Voltage

VOUT

VIN = 5V, IOUT = 200mA, R1 = 17.4kΩ,

R2 = 10kΩ

3.22

3.29

3.36

V

Feedback Divider Current

IFB

JP1 = pins 2-3, JP2 = pins 1-2, R1 = 17.4kΩ,

R2 = 10kΩ

120

µA

Shutdown Input Current

IGND_SD

JP1 = pins 1-2, VIN = 4.3V, EN = GND

1.8

µA

1 The maximum power dissipation and, consequently, the maximum input voltage for an output that is programmed to

3.3V with a 200mA load is determined by the 60°C temperature rise of the ADPL42002 on the evaluation board. In

addition, consider the effect of ambient temperature and the maximum junction temperature that may occur. Refer to

the ADPL42002 data sheet for more information.

Printed Circuit Board (PCB) Layout

The printed circuit boards (PCBs) for these evaluation boards are 0.062 inches thick and 1.5 inches square. There are

two copper layers, and the finished copper thickness is 1 ounce. The input capacitor, ADPL42002, and output capacitor

are all placed on the top side of the PCB. The input and output capacitors are placed near the ADPL42002 with their

ground terminals close to each other. The input capacitor, output capacitor, and ADPL42002 grounds all connect on one

side of the device, while grounds for control signals connect to the ADPL42002 on the other side of the device. The bottom

side of the PCB is a solid ground plane that connects to the ground on the top PCB layer by thermal vias under or near

the ADPL42002 and at other points. Layout may significantly affect circuit electrical performance and reliability.