ADL6337ACRZD-R7 datasheet(32/53 Pages) AD

32 / 53 page

Data Sheet

ADL6337

PROGRAMMABILITY GUIDE

analog.com

Rev. E | 32 of 53

Viewing the register map at the highest level, the registers are

subdivided into the major functional blocks, as shown in Table 7.

See the Register Summary section for a complete list of all the

registers on the ADL6337.

Table 7. Memory Map Functional Groups

Functional Blocks

0x000 to 0x011

SPI configuration

0x100

Function enable

0x102, 0x114, 0x115, 0c116

Four DSA preconfigurations settings

(TXENP = 1)

0x103

DSA configuration (TXENP = 0)

0x104 to 0x106, 0x110 to 0x113

IREF and IP3 configuration

0x10A, 0x10B

DSA1 and DSA2 manual configuration

0x120

SPI supply control

The ADL6337 has a unique feature controlled by TXENP, Pin 1

(see Table 8). The TXENP pin can perform fast on/off switching

of device operations for time division duplex (TDD) transmit ap-

plications. When TXENP is set to low (0 V), AMP1 and AMP2

are disabled (power-down mode) and current consumptions are

reduced. Also, use this mode to adjust DSA level in Register 0x103.

Its default attenuation level is the maximum (31.5 dB).

The normal operation mode of the ADL6337 uses the TXENP

pin set high, but it is recommended that TXENP be set to low

when configuring the registers. When ramping the TXENP pin high,

normal operation starts, and the 0x100, 0x10A, 0x10B, 0x102,

0x104, 0x105, 0x106, 0x111, 0x112, 0x113, 0x110, 0x114, 0x115,

and 0x116 registers are used for operation.

AMP2, and IP3 tuning blocks (see Table 9). The default value

of 0x07 in Register 0x100 allows for four DSA preconfiguration

settings, selectable by ATTSEL1 (Pin 9) and ATTSEL2 (Pin 10). It is

also called Attenuation State 0, 1, 2, and 3 (see Table 10).

The 0x102, 0x114, 0x115, and 0x116 registers can configure the

DSA attenuation levels.

►

Attenuation State 0:

►

ATTSEL2 (Pin 10) = low

►

ATTSEL1 (Pin 9) = low

►

Attenuation State 1:

►

ATTSEL2 (Pin 10) = low

►

ATTSEL1 (Pin 9) = high

►

Attenuation State 2:

►

ATTSEL2 (Pin 10) = high

►

ATTSEL1 (Pin 9) = low

►

Attenuation State 3:

►

ATTSEL2 (Pin 10) = high

►

ATTSEL1 (Pin 9) = high

After the software reset asserts, the default settings for each mode

are shown in Table 9. Parameters can be overwritten before or

during the operations.

This feature allows for rapid RF performance switching using asyn-

chronous external control with the ATTSEL1 and ATTSEL2 Pins.

When the ATTSEL feature is not used and only one fixed attenu-

ation level is used for operation, it is recommended to connect

ATTSEL1 and ATTSEL2 to GND (0 V) and configure Register

0x102 for Attenuation State 0 to set the DSA attenuation level.

Note that the DSA1 and DSA2 attenuation levels cannot be config-

ured individually in the four preconfiguration settings. The maximum

attenuation level is 31.5 dB. If 20 dB attenuation is selected, the

attenuation level in DSA2 is maximized first, and the rest of attenu-

ation level is implemented in DSA1. It indicates that the attenuation

levels are automatically allocated in the DSA1 and DSA2 blocks

to maximize the noise figure performance. Note that the maximum

attenuation level in DSA2 is 15.75 dB, which has the duplicated

and 0x116 registers. The next attenuation (16.26 dB) in DSA1 starts

at the 33 decimal value.

Setting DSA_MAN_EN_0[7] = 1 in Register 0x100 allows for indi-

vidual control attenuation levels of DSA1 and DSA2 in Register

0x10A and Register 0x10B.

If the TXENP pin is held high when the 5 V supplies are applied, the

device ramps up with the 5 V supplies. It is suggested that TXENP

be held low during power-up.

ATTSEL1 and ATTSEL2 can be used to preset the DSA to any

value from 0 dB to 31.5 dB by preprogramming the desired values

via the SPI or using the default values provided in Table 10.

Table 8. TXENP Mode Selection

TXENP (Pin 1)

Operation Mode

Description

0 (Low)

Power-down mode

0x103

To adjust DSA level manually. Default is the maximum attenuation level. AMP1

and AMP2 are disabled.

1 (High)

Normal operation mode

0x100

Enable AMP1, AMP2, LDO, etc.

Enable bit to adjust DSA1 and DSA2 individually.

0x10A, 0x10B

To adjust DSA1 and DSA2 levels individually at DSA_MAN_EN_0 0x100[7] = 1.

0x102, 0x114, 0x115, 0x116

Four preconfiguration DSA attenuation settings by ATTSEL1 (Pin 9) and

ATTSEL2 (Pin 10) at DSA_MAN_EN_0 0x100[7] = 0 (default).

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