CDC204

HEX INVERTER/CLOCK DRIVER

SCAS098E – OCTOBER 1989– REVISED OCTOBER 1998

1

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

D CDC204 Replaces 74AC11204

D Low-Skew Propagation Delay

Specifications for Clock-Driver Applications

D CMOS-Compatible Inputs and Outputs

D Flow-Through Architecture Optimizes

PCB Layout

D Center-Pin VCC and GND Pin

Configurations Minimize High-Speed

Switching Noise

D EPIC ™ (Enhanced-Performance Implanted

CMOS) 1-

µm Process

D 500-mA Typical Latch-Up Immunity at

125

°C

D Package Options Include Plastic

Small-Outline Package (DW))

description

The CDC204 contains six independent inverters. The device performs the Boolean function Y = A. It is designed

specifically for applications requiring low skew between switching outputs.

The CDC204 is characterized for operation from TA = 25°C to 70°C.

FUNCTION TABLE

INPUT

A

OUTPUT

Y

H

L

L

H

logic symbol†

logic diagram (positive logic)

1A

20

20

1A

1Y

1

19

2A

2Y

2

18

3A

3Y

3

13

4A

4Y

8

12

5A

5Y

9

11

6A

6Y

10

1

1Y

1

2A

19

2Y

2

3A

18

3Y

3

4A

13

4Y

8

5A

12

5Y

9

6A

11

6Y

† This symbol is in accordance with ANSI/IEEE Std 91-1984

and IEC Publication 617-12.

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Copyright

© 1998, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

EPIC is a trademark of Texas Instruments Incorporated.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

12

11

1Y

2Y

3Y

GND

GND

GND

GND

4Y

5Y

6Y

1A

2A

3A

NC

VCC

VCC

NC

4A

5A

6A

DW PACKAGE

(TOP VIEW)

NC – No internal connection