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STM32G474CEU6 数据表(PDF) 202 Page - STMicroelectronics |
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STM32G474CEU6 数据表(HTML) 202 Page - STMicroelectronics |
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202 / 232 page  Package information STM32G474xB STM32G474xC STM32G474xE 202/232 DS12288 Rev 1 6 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 6.1 WLCSP81 package information Figure 53. WLCSP - 81 balls, 4.02x4.27 mm, 0.4 mm pitch wafer level chip scale package outline 1. Drawing is not to scale. 2. Dimension is measured at the maximum bump diameter parallel to primary datum Z. 3. Primary datum Z and seating plane are defined by the spherical crowns of the bump. 4. Bump position designation per JESD 95-1, SPP-010. |
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