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PIC16LF18323-E/RF 数据表(PDF) 92 Page - Microchip Technology |
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PIC16LF18323-E/RF 数据表(HTML) 92 Page - Microchip Technology |
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92 / 442 page ![]() PIC16(L)F18313/18323 DS40001799A-page 92 Preliminary 2015 Microchip Technology Inc. REGISTER 7-6: PIE4: PERIPHERAL INTERRUPT ENABLE REGISTER 4 U-0 R/W-0/0 U-0 U-0 U-0 U-0 R/W-0/0 R/W-0/0 —CWG1IE — — — — CCP2IE CCP1IE bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets ‘1’ = Bit is set ‘0’ = Bit is cleared HS = Hardware set bit 7 Unimplemented: Read as ‘0’ bit 6 CWG1IE: CWG 1 Interrupt Enable bit 1 = CWG1 interrupt enabled 0 = CWG1 interrupt not enabled bit 5-2 Unimplemented: Read as ‘0’ bit 1 CCP2IE: CCP2 Interrupt Enable bit 1 = CCP2 interrupt is enabled 0 = CCP2 interrupt is not enabled bit 0 CCP1IE: CCP1 Interrupt Enable bit 1 = CCP1 interrupt is enabled 0 = CCP1 interrupt is not enabled Note: Bit PEIE of the INTCON register must be set to enable any peripheral interrupt. |
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