DEVICE INFORMATION

PACKAGE

1

8

2

7

3

6

4

5

CDCS503

IN

SSC_SEL 0

SSC_SEL 1

GND

V

DD

OE

OUT

FS

PACKAGE THERMAL RESISTANCE FOR TSSOP (PW) PACKAGE

CDCS503

SCAS872 – MARCH 2009 .................................................................................................................................................................................................. www.ti.com

FUNCTION TABLE

OE

FS

SSC_SEL 0

SSC_SEL 1

SSC AMOUNT

fOUT/fIN

fOUT at fin = 27 MHz

0

x

x

x

x

x

3-state

1

0

0

0

±0.00%

1

27 MHz

1

0

0

1

±0.50%

1

27 MHz

1

0

1

0

±1.00%

1

27 MHz

1

0

1

1

±2.00%

1

27 MHz

1

1

0

0

±0.00%

4

108 MHz

1

1

0

1

±0.50%

4

108 MHz

1

1

1

0

±1.00%

4

108 MHz

1

1

1

1

±2.00%

4

108 MHz

PIN FUNCTIONS

SIGNAL

PIN

TYPE

DESCRIPTION

IN

1

I

LVCMOS Clock input

OUT

6

O

LVCMOS Clock Output

SSC_SEL 0, 1

2, 3

I

Spread Selection Pins, internal pull-up

OE

7

I

Output Enable, internal pull-up

FS

5

I

Frequency Multiplication Selection, internal pull-up

VDD

8

Power

3.3V Power Supply

GND

4

Ground

Ground

over operating free-air temperature range (unless otherwise noted)

(1)

THERMAL AIRFLOW (CFM)

CDCS503PW 8-PIN TSSOP

UNIT

0

150

250

500

High K

149

142

138

132

RθJA

°C/W

Low K

230

185

170

150

High K

65

RθJC

°C/W

Low K

69

(1)

The package thermal impedance is calculated in accordance with JESD 51 and JEDEC2S2P (high-k board).

2

Submit Documentation Feedback

Copyright © 2009, Texas Instruments Incorporated

Product Folder Link(s): CDCS503