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FDS6912. 数据表(PDF) 2 Page - ON Semiconductor |
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FDS6912. 数据表(HTML) 2 Page - ON Semiconductor |
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2 / 7 page ![]() July 2000 2000 Fairchild Semiconductor Corporation FDS6912 Rev F (W) FDS6912 Dual N-Channel Logic Level PWM Optimized PowerTrench MOSFET General Description These N-Channel Logic Level MOSFETs have been designed specifically to improve the overall efficiency of DC/DC converters using either synchronous or conventional switching PWM controllers. These MOSFETs feature faster switching and lower gate charge than other MOSFETs with comparable RDS(ON) specifications. The result is a MOSFET that is easy and safer to drive (even at very high frequencies), and DC/DC power supply designs with higher overall efficiency. Features • 6 A, 30 V. RDS(ON) = 0.028 Ω @ V GS = 10 V RDS(ON) = 0.042 Ω @ V GS = 4.5 V. • Optimized for use in switching DC/DC converters with PWM controllers • Very fast switching. • Low gate charge S2 SO-8 G2 S1 G1 D2 D2 D1 D1 4 3 2 1 5 6 7 8 Q1 Q2 Absolute Maximum Ratings TA=25 oC unless otherwise noted Symbol Parameter Ratings Units VDSS Drain-Source Voltage 30 V VGSS Gate-Source Voltage ±25 V ID Drain Current – Continuous (Note 1a) 6A – Pulsed 20 Power Dissipation for Dual Operation 2 Power Dissipation for Single Operation (Note 1a) 1.6 (Note 1b) 1 PD (Note 1c) 0.9 W TJ, Tstg Operating and Storage Junction Temperature Range -55 to +150 °C Thermal Characteristics RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/W RθJC Thermal Resistance, Junction-to-Case (Note 1) 40 °C/W Package Marking and Ordering Information Device Marking Device Reel Size Tape width Quantity FDS6912 FDS6912 13’’ 12mm 2500 units |
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