DESCRIPTION

PACKAGE

SSC_SEL 0

1

8

XOUT

SSC_SEL 1

2

7

FS

GND

3

6

OUT

XIN

4

5

CDCS502

VDD

CDCS502

SCAS868 – DECEMBER 2008........................................................................................................................................................................................... www.ti.com

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

The CDCS502 is a spread spectrum capable, fundamental mode crystal oscillator with selectable frequency

multiplication.

It features an advanced gain controlled fundamental mode crystal oscillator stage with a built-in load capacitance

of 10pF. This oscillator stage accepts crystals from 8MHz to 32MHz with an ESR of up to 180

Ω. The stage can

be used with crystals with power dissipation of 50

µW and up.

The input signal is processed by a PLL, whose output frequency is either equal to the input frequency or

multiplied by the factor of 4.

The PLL is also able to spread the clock signal by ±0%, ±0.5%, ±1% or ±2% centered around the output clock

frequency with an triangular modulation.

By this, the device can generate output frequencies between 8MHz and 108MHz with or without SSC from a

fundamental mode crystal.

In x1 Mode with an SSC amount of 0%, the device works as a standard crystal oscillator and does not make use

of the built in PLL.

The CDCS502 operates in 3.3V environment.

It is characterized for operation from –40°C to 85°C. It is offered in an 8 Pin TSSOP package.

FUNCTION TABLE

FS

SSC_SEL 0

SSC_SEL 1

SSC Amount

fOUT/fIN

fOUT at fin = 27 MHz

0

0

0

±0.00%

1

27 MHz(1)

0

0

1

±0.50%

1

27 MHz

0

1

0

±1.00%

1

27 MHz

0

1

1

±2.00%

1

27 MHz

1

0

0

±0.00%

4

108 MHz

1

0

1

±0.50%

4

108 MHz

1

1

0

±1.00%

4

108 MHz

1

1

1

±2.00%

4

108 MHz

(1)

In this mode the signal from the crystal bypasses the internal PLL for maximum performance.

PIN FUNCTIONS

SIGNAL

PIN

TYPE

DESCRIPTION

XIN

1

I

Crystal Input

XOUT

8

O

Crystal Output

OUT

6

O

LVCMOS Clock Output

SSC_SEL 0, 1

2, 3

I

Spread Selection Pins, internal pull-up

FS

5

I

Frequency Multiplication Selection, internal pull-up

VDD

7

Power

3.3V Power Supply

GND

4

Ground

Ground

2

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