WM8909 datasheet(4/363 Pages) CIRRUS

4 / 363 page

WM8994

Rev 4.6

DC SERVO ACTIVE MODES ......................................................................................................................................................138

GPIO / INTERRUPT OUTPUTS FROM DC SERVO ...................................................................................................................140

ANALOGUE OUTPUTS .........................................................................................................140

SPEAKER OUTPUT CONFIGURATIONS...................................................................................................................................140

HEADPHONE OUTPUT CONFIGURATIONS .............................................................................................................................143

EARPIECE DRIVER OUTPUT CONFIGURATIONS ...................................................................................................................144

LINE OUTPUT CONFIGURATIONS............................................................................................................................................144

GENERAL PURPOSE INPUT/OUTPUT ................................................................................147

GPIO CONTROL .........................................................................................................................................................................148

GPIO FUNCTION SELECT .........................................................................................................................................................151

BUTTON DETECT (GPIO INPUT)...............................................................................................................................................152

LOGIC ‘1’ AND LOGIC ‘0’ OUTPUT (GPIO OUTPUT)................................................................................................................152

SDOUT (4-WIRE SPI CONTROL INTERFACE DATA) ...............................................................................................................153

INTERRUPT (IRQ) STATUS OUTPUT........................................................................................................................................153

OVER-TEMPERATURE DETECTION.........................................................................................................................................153

ACCESSORY DETECTION (MICBIAS CURRENT DETECTION) ..............................................................................................154

FREQUENCY LOCKED LOOP (FLL) LOCK STATUS OUTPUT ................................................................................................155

SAMPLE RATE CONVERTER (SRC) LOCK STATUS OUTPUT ...............................................................................................155

DYNAMIC RANGE CONTROL (DRC) SIGNAL ACTIVITY DETECTION ....................................................................................155

CONTROL WRITE SEQUENCER STATUS DETECTION ..........................................................................................................157

DIGITAL CORE FIFO ERROR STATUS DETECTION................................................................................................................158

OPCLK CLOCK OUTPUT............................................................................................................................................................158

FLL CLOCK OUTPUT..................................................................................................................................................................158

INTERRUPTS ........................................................................................................................159

DIGITAL AUDIO INTERFACE................................................................................................166

MASTER AND SLAVE MODE OPERATION...............................................................................................................................167

OPERATION WITH TDM.............................................................................................................................................................167

AUDIO DATA FORMATS (NORMAL MODE) ..............................................................................................................................168

AUDIO DATA FORMATS (TDM MODE) .....................................................................................................................................171

DIGITAL AUDIO INTERFACE CONTROL .............................................................................173

AIF1 - MASTER / SLAVE AND TRI-STATE CONTROL..............................................................................................................173

AIF1 - SIGNAL PATH ENABLE ...................................................................................................................................................174

AIF1 - BCLK AND LRCLK CONTROL .........................................................................................................................................174

AIF1 - DIGITAL AUDIO DATA CONTROL...................................................................................................................................177

AIF1 - MONO MODE ...................................................................................................................................................................178

AIF1 - COMPANDING .................................................................................................................................................................179

AIF1 - LOOPBACK ......................................................................................................................................................................180

AIF2 - MASTER / SLAVE AND TRI-STATE CONTROL..............................................................................................................181

AIF2 - SIGNAL PATH ENABLE ...................................................................................................................................................182

AIF2 - BCLK AND LRCLK CONTROL .........................................................................................................................................182

AIF2 - DIGITAL AUDIO DATA CONTROL...................................................................................................................................185

AIF2 - MONO MODE ...................................................................................................................................................................186

AIF2 - COMPANDING .................................................................................................................................................................187

AIF2 - LOOPBACK ......................................................................................................................................................................187

AUDIO INTERFACE AIF3 CONFIGURATION ............................................................................................................................188

DIGITAL PULL-UP AND PULL-DOWN........................................................................................................................................190

CLOCKING AND SAMPLE RATES........................................................................................191

AIF1CLK ENABLE .......................................................................................................................................................................192

AIF1 CLOCKING CONFIGURATION ..........................................................................................................................................193

AIF2CLK ENABLE .......................................................................................................................................................................195

AIF2 CLOCKING CONFIGURATION ..........................................................................................................................................195

MISCELLANEOUS CLOCK CONTROLS ....................................................................................................................................197

BCLK AND LRCLK CONTROL....................................................................................................................................................200

CONTROL INTERFACE CLOCKING ..........................................................................................................................................201

FREQUENCY LOCKED LOOP (FLL) ..........................................................................................................................................201

WM8909 数据表(PDF) 4 Page - Cirrus Logic

WM8909 数据表(HTML) 4 Page - Cirrus Logic

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载