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74HCT240DB 数据表(PDF) 3 Page - NXP Semiconductors |
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74HCT240DB 数据表(HTML) 3 Page - NXP Semiconductors |
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3 / 17 page ![]() 74HC_HCT240 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet Rev. 4 — 25 February 2016 3 of 17 NXP Semiconductors 74HC240; 74HCT240 Octal buffer/line driver; 3-state; inverting 5. Pinning information 5.1 Pinning 5.2 Pin description (1) This is not a supply pin. The substrate is attached to this pad using conductive die attach material. There is no electrical or mechanical requirement to solder this pad. However, if it is soldered, the solder land should remain floating or be connected to GND. Fig 4. Pin configuration SO20, (T)SSOP20 Fig 5. Pin configuration DHVQFN20 Table 2. Pin description Symbol Pin Description 1OE, 2OE 1, 19 output enable input (active LOW) 1A0, 1A1, 1A2, 1A3 2, 4, 6, 8 data input 2Y0, 2Y1, 2Y2, 2Y3 3, 5, 7, 9 bus output GND 10 ground (0 V) 2A0, 2A1, 2A2, 2A3 17, 15, 13, 11 data input 1Y0, 1Y1, 1Y2, 1Y3 18, 16, 14, 12 bus output VCC 20 supply voltage |
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