CDx4HC365-Q1, CD74HC366-Q1 High-Speed CMOS Logic HEX Buffer/Line Driver,

Three-State Non-Inverting and Inverting

1 Features

• Qualified for automotive applications

• Buffered inputs

• High current bus driver outputs

• Typical propagation delay tPLH, tPHL = 8 ns at VCC

= 5 V, CL = 15 pF, TA = 25°C

• Fanout (over temperature range)

– Standard outputs – 10 LSTTL loads

– Bus driver outputs – 15 LSTTL loads

• Wide operating temperature range: –40°C to

125°C

• Balanced propagation delay and transition times

• Significant power reduction compared to LSTTL

logic ICs

• HC types

– 2 V to 6 V operation

– High noise immunity: NIL = 30%, NIH = 30% of

VCC at VCC = 5 V

• HCT types

– 4.5 V to 5.5 V operation

– Direct LSTTL input logic compatibility, VIL= 0.8

V (maximum), VIH = 2 V (minimum)

– CMOS input compatibility, Il ≤ 1 μA at VOL, VOH

2 Description

The

CD74HC365-Q1,

CD74HC366-Q1,

and

CD74HCT365-Q1 silicon gate CMOS three state

buffers are general purpose high-speed non-inverting

and inverting buffers. They have high drive current

outputs which enable high speed operation even

when driving large bus capacitances. These circuits

possess the low power dissipation of CMOS circuitry,

yet have speeds comparable to low power Schottky

TTL circuits. Both circuits are capable of driving up to

15 low power Schottky inputs.

Device Information

PART NUMBER

PACKAGE

(1)

BODY SIZE (NOM)

CD74HC366QDRQ1 D (SOIC, 16)

9.90 mm × 3.90 mm

(1)

For all available packages, see the orderable addendum at

the end of the data sheet.

Functional Block Diagram

CD74HC365-Q1, CD74HC366-Q1, CD74HCT365-Q1

SCHS382A – JANUARY 2010 – REVISED AUGUST 2022

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.