INPUT AND OUTPUT EQUIVALENT CIRCUIT

LOGIC DIAGRAMS

PIN DESCRIPTION

PIN No

SYMBOL

NAME AND FUNCT ION

1

CLEAR

Asyncronous Master

Reset (Active LOW)

2, 5, 6, 9, 12,

15, 16, 19

Q0 to Q7

Flip-Flop Outpus

3, 4, 7, 8, 13,

14, 17, 18

D0 to D7

Data Inputs

11

CLOCK

Clock Input

(LOW-to-HIGH, Edge-

Triggered)

10

GND

Ground (0V)

20

Positive Supply Voltage

TRUTH TABLE

I NPUTS

OUT PUT S

F UNCTIO N

CL EAR

D

CLO CK

Q

L

X

X

L

CLEAR

HL

L

HH

H

HX

NO CHANGE

X:Don’t Care

Thislogic diagram has notbe used to esimate propagation delays

74ACT273

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