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M58LR128GT 数据表(PDF) 19 Page - STMicroelectronics

部件名 M58LR128GT
功能描述  128 Mbit (8Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory
PDF  84 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

M58LR128GT 数据表(HTML) 19 Page - STMicroelectronics

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M58LR128GT, M58LR128GB
The segments are programmed one Word at a
time. When shipped all bits in the segment are set
to ‘1’. The user can only program the bits to ‘0’.
Two Bus Write cycles are required to issue the
Protection Register Program command.
The first bus cycle sets up the Protection
Register Program command.
The second latches the address and data to
be programmed to the Protection Register and
starts the Program/Erase Controller.
Read operations to the bank being programmed
output the Status Register content after the pro-
gram operation has started.
Attempting to program a previously protected Pro-
tection Register will result in a Status Register er-
ror.
The Protection Register Program cannot be sus-
pended. Dual operations between the Parameter
Bank and the Protection Register memory space
are not allowed (see Table 15., Dual Operation
Limitations for details).
The two Protection Register Locks are used to
protect the OTP segments from further modifica-
tion. The protection of the OTP segments is not re-
versible. Refer to Figure 5., Protection Register
Memory Map, and Figure 5., Protection Register
Memory Map, for details on the Lock bits.
See APPENDIX C., Figure 26., Protection Regis-
ter Program Flowchart and Pseudo Code, for a
flowchart for using the Protection Register Pro-
gram command.
Set Configuration Register Command
The Set Configuration Register command is used
to write a new value to the Configuration Register.
Two Bus Write cycles are required to issue the Set
Configuration Register command.
The first cycle sets up the Set Configuration
Register command and the address
corresponding to the Configuration Register
content.
The second cycle writes the Configuration
Register data and the confirm command.
The Configuration Register data must be written
as an address during the bus write cycles, that is
A0 = CR0, A1 = CR1, …, A15 = CR15. Addresses
A16- A22 are ignored.
Read operations output the array content after the
Set Configuration Register command is issued.
The Read Electronic Signature command is re-
quired to read the updated contents of the Config-
uration Register.
Block Lock Command
The Block Lock command is used to lock a block
and prevent program or erase operations from
changing the data in it. All blocks are locked after
power-up or reset.
Two Bus Write cycles are required to issue the
Block Lock command.
The first bus cycle sets up the Block Lock
command.
The second Bus Write cycle latches the block
address and locks the block.
The lock status can be monitored for each block
using the Read Electronic Signature command.
Table 16. shows the Lock Status after issuing a
Block Lock command.
Once set, the Block Lock bits remain set even after
a hardware reset or power-down/power-up. They
are cleared by a Block Unlock command.
Refer to the section, Block Locking, for a detailed
explanation.
See
APPENDIX
C.,
Figure
25., Locking Operations Flowchart and Pseudo
Code, for a flowchart for using the Lock command.
Block Unlock Command
The Block Unlock command is used to unlock a
block, allowing the block to be programmed or
erased.
Two Bus Write cycles are required to issue the
Block Unlock command.
The first bus cycle sets up the Block Unlock
command.
The second Bus Write cycle latches the block
address and unlocks the block.
The lock status can be monitored for each block
using the Read Electronic Signature command.
Table 16. shows the protection status after issuing
a Block Unlock command.
Refer to the section, Block Locking, for a detailed
explanation
and
APPENDIX
C.,
Figure
25., Locking Operations Flowchart and Pseudo
Code, for a flowchart for using the Block Unlock
command.
Block Lock-Down Command
The Block Lock-Down command is used to lock-
down a locked or unlocked block.
A locked-down block cannot be programmed or
erased. The lock status of a locked-down block
cannot be changed when WP is low, VIL. When
WP is high, VIH, the lock-down function is disabled
and the locked blocks can be individually unlocked
by the Block Unlock command.
Two Bus Write cycles are required to issue the
Block Lock-Down command.



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