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S25FL128SDPNFB3 数据表(PDF) 4 Page - Cypress Semiconductor |
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S25FL128SDPNFB3 数据表(HTML) 4 Page - Cypress Semiconductor |
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4 / 149 page ![]() Document Number: 001-98283 Rev. *M Page 3 of 148 S25FL128S/S25FL256S Contents 1. Overview ....................................................................... 4 1.1 General Description ....................................................... 4 1.2 Migration Notes.............................................................. 5 1.3 Glossary......................................................................... 7 1.4 Other Resources............................................................ 7 Hardware Interface 2. Signal Descriptions ..................................................... 8 2.1 Input/Output Summary................................................... 8 2.2 Address and Data Configuration.................................... 9 2.3 RESET# ......................................................................... 9 2.4 Serial Clock (SCK) ......................................................... 9 2.5 Chip Select (CS#) .......................................................... 9 2.6 Serial Input (SI) / IO0 ................................................... 10 2.7 Serial Output (SO) / IO1............................................... 10 2.8 Write Protect (WP#) / IO2 ............................................ 10 2.9 Hold (HOLD#) / IO3 ..................................................... 10 2.10 Core Voltage Supply (VCC) .......................................... 11 2.11 Versatile I/O Power Supply (VIO) ................................. 11 2.12 Supply and Signal Ground (VSS) ................................. 11 2.13 Not Connected (NC) .................................................... 11 2.14 Reserved for Future Use (RFU)................................... 11 2.15 Do Not Use (DNU) ....................................................... 11 2.16 Block Diagrams............................................................ 12 3. Signal Protocols ......................................................... 13 3.1 SPI Clock Modes ......................................................... 13 3.2 Command Protocol ...................................................... 14 3.3 Interface States............................................................ 18 3.4 Configuration Register Effects on the Interface ........... 22 3.5 Data Protection ............................................................ 22 4. Electrical Specifications ............................................ 23 4.1 Absolute Maximum Ratings ......................................... 23 4.2 Thermal Resistance ..................................................... 23 4.3 Operating Ranges........................................................ 23 4.4 Power-Up and Power-Down ........................................ 25 4.5 DC Characteristics ....................................................... 26 5. Timing Specifications ................................................ 28 5.1 Key to Switching Waveforms ....................................... 28 5.2 AC Test Conditions ...................................................... 28 5.3 Reset............................................................................ 29 5.4 SDR AC Characteristics............................................... 31 5.5 DDR AC Characteristics .............................................. 35 6. Physical Interface ...................................................... 37 6.1 SOIC 16-Lead Package ............................................... 37 6.2 WSON Package........................................................... 39 6.3 FAB024 24-Ball BGA Package .................................... 40 6.4 FAC024 24-Ball BGA Package .................................... 42 Software Interface 7. Address Space Maps .................................................. 44 7.1 Overview....................................................................... 44 7.2 Flash Memory Array...................................................... 44 7.3 ID-CFI Address Space.................................................. 46 7.4 OTP Address Space ..................................................... 46 7.5 Registers....................................................................... 48 8. Data Protection ........................................................... 58 8.1 Secure Silicon Region (OTP)........................................ 58 8.2 Write Enable Command................................................ 58 8.3 Block Protection............................................................ 59 8.4 Advanced Sector Protection ......................................... 60 9. Commands .................................................................. 64 9.1 Command Set Summary............................................... 65 9.2 Identification Commands .............................................. 71 9.3 Register Access Commands......................................... 73 9.4 Read Memory Array Commands .................................. 84 9.5 Program Flash Array Commands ............................... 100 9.6 Erase Flash Array Commands.................................... 106 9.7 One Time Program Array Commands ........................ 111 9.8 Advanced Sector Protection Commands.................... 112 9.9 Reset Commands ....................................................... 118 9.10 Embedded Algorithm Performance Tables ................. 119 10. Data Integrity ............................................................. 121 10.1 Erase Endurance ........................................................ 121 10.2 Data Retention............................................................ 121 11. Software Interface Reference .................................. 122 11.1 Command Summary................................................... 122 11.2 Device ID and Common Flash Interface (ID-CFI) Address Map................................................. 124 11.3 Device ID and Common Flash Interface (ID-CFI) ASO Map — Automotive Only ...................... 137 11.4 Registers..................................................................... 137 11.5 Initial Delivery State .................................................... 140 12. Ordering Information ................................................ 141 13. Contacting Cypress .................................................. 143 14. Revision History ........................................................ 144 Sales, Solutions, and Legal Information ........................ 148 Worldwide Sales and Design Support ......................... 148 Products ...................................................................... 148 PSoC® Solutions ........................................................ 148 Cypress Developer Community ................................... 148 Technical Support ....................................................... 148 |
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