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STM32F412RGT6P 数据表(PDF) 108 Page - STMicroelectronics |
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STM32F412RGT6P 数据表(HTML) 108 Page - STMicroelectronics |
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108 / 201 page ![]() Electrical characteristics STM32F412xE/G 108/201 DocID028087 Rev 7 Low-speed external user clock generated from an external source In bypass mode the LSE oscillator is switched off and the input pin is a standard I/O. The external clock signal has to respect the Table 57. However, the recommended clock input waveform is shown in Figure 28. The characteristics given in Table 40 result from tests performed using an low-speed external clock source, and under ambient temperature and supply voltage conditions summarized in Table 16. Figure 27. High-speed external clock source AC timing diagram Table 40. Low-speed external user clock characteristics Symbol Parameter Conditions Min Typ Max Unit fLSE_ext User External clock source frequency(1) - 32.768 1000 kHz VLSEH OSC32_IN input pin high level voltage 0.7VDD -VDD V VLSEL OSC32_IN input pin low level voltage VSS -0.3VDD tw(LSE) tf(LSE) OSC32_IN high or low time(1) 450 - - ns tr(LSE) tf(LSE) OSC32_IN rise or fall time(1) -- 50 Cin(LSE) OSC32_IN input capacitance(1) -5 - pF DuCy(LSE) Duty cycle 30 - 70 % IL OSC32_IN Input leakage current VSS ≤ VIN ≤ VDD -- ±1 µA 1. Guaranteed by design, not tested in production. |
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