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STM32F412RGU6 数据表(PDF) 121 Page - STMicroelectronics |
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STM32F412RGU6 数据表(HTML) 121 Page - STMicroelectronics |
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121 / 201 page  DocID028087 Rev 7 121/201 STM32F412xE/G Electrical characteristics 166 6.3.14 Absolute maximum ratings (electrical sensitivity) Based on three different tests (ESD, LU) using specific measurement methods, the device is stressed in order to determine its performance in terms of electrical sensitivity. Electrostatic discharge (ESD) Electrostatic discharges (a positive then a negative pulse separated by 1 second) are applied to the pins of each sample according to each pin combination. The sample size depends on the number of supply pins in the device (3 parts × (n+1) supply pins). This test conforms to the JESD22-A114/C101 standard. Static latchup Two complementary static tests are required on six parts to assess the latchup performance: • A supply overvoltage is applied to each power supply pin • A current injection is applied to each input, output and configurable I/O pin These tests are compliant with EIA/JESD 78A IC latchup standard. Table 54. ESD absolute maximum ratings Symbol Ratings Conditions Class Maximum value(1) Unit VESD(HBM) Electrostatic discharge voltage (human body model) TA = +25 °C conforming to JESD22-A114 2 2000 V VESD(CDM) Electrostatic discharge voltage (charge device model) TA = +25 °C conforming to ANSI/ESD STM5.3.1, UFBGA144, UFBGA100, LQFP100, LQFP64, UFQFPN48 4500 TA = +25 °C conforming to ANSI/ESD STM5.3.1, WLCSP64 3400 TA = +25 °C conforming to ANSI/ESD STM5.3.1, LQFP144 3250 1. Guaranteed by characterization, not tested in production. Table 55. Electrical sensitivities Symbol Parameter Conditions Class LU Static latch-up class TA = +125 °C conforming to JESD78A II level A |
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