TL032ACDR datasheet(22/68 Pages) TI

22 / 68 page

TL03x, TL03xA

ENHANCED-JFET LOW-POWER LOW-OFFSET

OPERATIONAL AMPLIFIERS

SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

TL034M and TL034AM electrical characteristics at specified free-air temperature

TL034M, TL034AM

PARAMETER

TEST CONDITIONS

VCC

± = ±5 V

VCC

± = ±15 V

UNIT

MIN

TYP

MAX

MIN

TYP

MAX

TL034M

°C

0.91

3.6

0.78

VIO

Input offset voltage

VO = 0,

VIC 0

TL034M

Full range†

VIO

Input offset voltage

VIC = 0,

RS = 50 Ω

TL034AM

°C

0.7

3.5

0.58

1.5

RS = 50 Ω

TL034AM

Full range†

8.5

6.5

Temperature coefficient of

VO = 0,

VIC 0

TL034M

°C to

125

°C

10.6

10.9

µV/°C

input offset voltage

VIC = 0,

RS = 50 Ω

TL034AM

°C to

125

°C

10.6

10.9

µV/°C

Input offset voltage

long-term drift‡

VO = 0,

VIC = 0,

RS = 50 Ω

°C

0.04

µV/mo

IIO

Input offset current

VO = 0, VIC = 0

°C

100

IIO

Input offset current

See Figure 5

125

°C

0.2

IIB

Input bias current

VO = 0, VIC = 0

°C

200

IIB

Input bias current

See Figure 5

125

°C

VICR

Common-mode input

°C

–1.5

to 4

–3.4

to 5.4

–11.5

to 14

–13.4

to 15.4

VICR

voltage range

Full range†

–1.5

to 4

–11.5

to 14

iti

°C

4.3

VOM+

Maximum positive peak

output voltage swing

RL = 10 kΩ

–55

°C

4.1

out ut voltage swing

125

°C

4.4

°C

–3

–4.2

–12.5

–13.9

VOM–

Maximum negative peak

output voltage swing

RL = 10 kΩ

–55

°C

–3

–4

–12.5

–13.8

out ut voltage swing

125

°C

–3

–4.3

–12.5

–14

l diff

ti l

°C

14.3

AVD

Large-signal differential

voltage amplification§

RL = 10 kΩ

–55

°C

7.1

10.4

V/mV

voltage am lification§

125

°C

12.9

Input resistance

°C

1012

Ω

Input capacitance

°C

CMRR

Common-mode

rejection ratio

VIC = VICRmin,

VO =0 RS =50 Ω

–55

°C

rejection ratio

VO = 0, RS = 50 Ω

125

°C

Supply-voltage

°C

kSVR

ly voltage

rejection ratio

( V

/ V)

VO = 0, RS = 50 Ω

–55

°C

(

∆VCC±/∆VIO)

125

°C

† Full range is –55

°C to 125°C.

‡ Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to

TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

§ At VCC± = ±5 V, VO = ±2.3 V; at VCC± = ±15 V, VO = ±10 V

TL032ACDR 数据表(PDF) 22 Page - Texas Instruments

TL032ACDR 数据表(HTML) 22 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68

数据表下载

链接网址

TL032ACDR 数据表(PDF) 22 Page - Texas Instruments

TL032ACDR 数据表(HTML) 22 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68

数据表 下载

链接网址

数据表下载